RE: [sv-cc] PDF version of clean Scheduling Proposal

From: Jim Vellenga <vellenga_at_.....>
Date: Wed Feb 07 2007 - 08:40:23 PST
Cliff,

(1) The last sentence in "9.3.3.8 Pre_postponed PLI region"
appears to be extraneous.  It replicates the last sentence
preceding "9.3.3.1 Preponed PLI region".

(2) In the last paragraph of "9.3 The stratified event
scheduler", the word "essentially" adds nothing to the
standard.  Technically, it could mean that it is essential
to the construction of the current standard that these
regions be there, but many people, following common
usage, will read it as meaning "more or less".  Even
though the word is part of IEEE Std 1800-2005, it should
be removed.

Regards,
Jim

--------------------------------------------------------- 
James H. Vellenga                            978-262-6381 
Engineering Director                   (FAX) 978-262-6636 
Cadence Design Systems, Inc.         vellenga@cadence.com 
270 Billerica Rd
Chelmsford, MA 01824-4179
"We all work with partial information." 
----------------------------------------------------------  

]-----Original Message-----
]From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On 
]Behalf Of Clifford E. Cummings
]Sent: Monday, February 05, 2007 9:13 PM
]To: sv-ec@eda.org; sv-ac@eda.org; sv-cc@eda.org
]Subject: [sv-cc] PDF version of clean Scheduling Proposal
]
]Sorry -
]
]I meant to send the PDF version of the clean event scheduling 
]proposal. Attached.
]
]Regards - Cliff
]
]----------------------------------------------------
]Cliff Cummings - Sunburst Design, Inc.
]14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
]Phone: 503-641-8446 / FAX: 503-641-8486
]cliffc@sunburst-design.com / www.sunburst-design.com
]Expert Verilog, SystemVerilog, Synthesis and Verification Training
]
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Received on Wed Feb 7 08:40:51 2007

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