Bassam, I just looked again at your edits to the clocking block diagram. (There's something wrong with the diagram even without your edits. I don't believe the arrow from "clocking io decl" to "clocking block" should be double-headed.) It's appropriate to remove the "concurrent assertions" bubble. But you might not need actually to add the "property decl" and "sequence decl" iterations. You already have them from the modified scope diagram anyhow, since a clocking block is a scope as well. The only reason to add them to the clocking block diagram would be to have a vpiClockingBlock relation (either double- or single-headed) from a property decl or sequence decl. But again, since each already has a vpiScope relation which would return the clocking block, the relation is really redundant. Would you agree? Regards, Jim Vellenga --------------------------------------------------------- James H. Vellenga 978-262-6381 Software Architect (FAX) 978-262-6636 Cadence Design Systems, Inc. vellenga@cadence.com 270 Billerica Rd Chelmsford, MA 01824-4179 "We all work with partial information." ---------------------------------------------------------- -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Jan 25 08:36:14 2008
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