RE: [sv-cc] Correction to clocking block diagram

My mistake.  I have not looked at the actual Mantis 606 change notes, but,
in re-reading this e-mail thread, I see that the merge issue is between
1800-2005 and the merged P1800-2009 LRM.  In that case, I have no idea how
the changes from 606 could have been dropped, since the merged LRM diagrams
came directly from 1800-2005.  Still it appears to be a problem that was
created during the merge.  Neil, it is your call as to whether this is an
editorial correction that I can make in draft 8.

Stu
~~~~~~~~~~~~~~~~~~~~~~~~~
Stuart Sutherland
stuart@sutherland-hdl.com
+1-503-692-0898
www.sutherland-hdl.com



> -----Original Message-----
> From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On Behalf Of
> Bresticker, Shalom
> Sent: Thursday, October 30, 2008 9:03 AM
> To: stuart@sutherland-hdl.com; Jim Vellenga; SV-CC
> Cc: Neil.Korpusik@sun.com
> Subject: RE: [sv-cc] Correction to clocking block diagram
> 
> Stu,
> 
> I don't understand. 606 corrected 1800, not 1364.
> 606 dealt with clocking blocks, which were not in 1364.
> 
> Shalom
> 
> > -----Original Message-----
> > From: Stuart Sutherland [mailto:stuart@sutherland-hdl.com]
> > Sent: Thursday, October 30, 2008 6:00 PM
> > To: Bresticker, Shalom; 'Jim Vellenga'; 'SV-CC'
> > Cc: Neil.Korpusik@Sun.COM
> > Subject: RE: [sv-cc] Correction to clocking block diagram
> >
> > Neil,
> >
> > I agree that this is a merge issue, since it was correct in
> > one LRM (1364) prior to the merge. Does this fall under the
> > category of editorial corrections that we can make for draft
> > 8?  This is your call.
> >
> > For the record, when I merged the LRMs, the VPI diagrams from
> > 1800 were used, as they were supposed to be a superset of
> > 1364.  The real problem here is that 606 only corrected one
> > LRM (1364), and not the duplicate (and
> > superset) information in the other LRM (1800).  That was one
> > of the hazards of keeping two LRMs, as some on the working
> > group wanted to do.
> >
> > Stu
> > ~~~~~~~~~~~~~~~~~~~~~~~~~
> > Stuart Sutherland
> > stuart@sutherland-hdl.com
> > +1-503-692-0898
> > www.sutherland-hdl.com
> >
> >
> >
> > > -----Original Message-----
> > > From: Bresticker, Shalom [mailto:shalom.bresticker@intel.com]
> > > Sent: Thursday, October 30, 2008 6:44 AM
> > > To: Jim Vellenga; SV-CC
> > > Cc: Neil.Korpusik@Sun.COM; stuart@sutherland-hdl.com
> > > Subject: RE: [sv-cc] Correction to clocking block diagram
> > >
> > > Jim,
> > >
> > > It is true that 606 specifies the same correction, but as
> > far as I can
> > > see, 606 preceded 1800-2005, and as you point out, 1800-2005 has it
> > > correctly.
> > >
> > > The error crept into the LRM in P1800-2009/Draft 2, the first merge
> > > version of 1364 and 1800, and was not spotted till now.
> > >
> > > Since this is an editorial merge error, maybe this is one
> > the editor
> > > can correct in the ballot version.
> > >
> > > Shalom
> > >
> > > > -----Original Message-----
> > > > From: owner-sv-cc@server.eda.org
> > > > [mailto:owner-sv-cc@server.eda.org] On Behalf Of Jim Vellenga
> > > > Sent: Thursday, October 30, 2008 3:15 PM
> > > > To: SV-CC
> > > > Subject: [sv-cc] Correction to clocking block diagram
> > > >
> > > > I have entered Mantis item 2509 to correct an incomplete
> > > > implementation of Mantis item 606, during which the arrows to the
> > > > right of the "clocking block" object did not get
> > separated correctly
> > > > as they were in IEEE Std 1800-2005.
> > > >
> > > > We should enter this as a ballot comment.
> > >
> > ---------------------------------------------------------------------
> > > Intel Israel (74) Limited
> > >
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