Sri, I think your assumption is wishful thinking, far from reality... The SPICE differences are not only syntactical, but also very deeply technical. I mean the model equations may be completely different. Even for a simple thing, such as a resistor, for example, HSPICE has options for expressing it as a sheet resistance, using geometric description, or the R=value, or R='any_valid_HSPICE_syntax_expression' syntax. I am not sure how many other SPICE flavors can do the sheet resistance or free expression format. But when it comes to the diode and transistor models, the picture gets even worse. For one, HSPICE has a bunch of MOSFET levels which may not be available in all other SPICE tools (or vice versa), but add to that the proprietary company SPICE flavors, such as Intel's or IBM's own home grown SPICE tools and their own highly specialized and proprietary equations. There is also a significant variation in the world of behavioral capabilities, the controlled sources. Some can do derivatives and integrals, others can't. Some have event triggered sources, others don't. And guess what, my relentless questions on the `define and string parameters came from my desire to implement an HSPICE compatible syntax, in which a voltage or current source could be written this way: E1 n1 n2 VOL='any_valid_HSPICE_syntax_expression' I1 n1 n2 CUR='any_valid_HSPICE_syntax_expression' In this syntax you can reference any node voltage, branch current, and/or simulation variable (time, frequency, etc...). Not too many SPICE flavors can do that, although one may argue that this is just a syntax feature. Well, in short, it is a big jungle... On the other hand we need to ask ourselves the fundamental question: What are we trying to achieve with the library? I don't think we can "standardize" SPICE, but we may be able to provide bridges of some sort if we define what we are trying to bridge... Arpad ================================================================== -----Original Message----- From: Chandrasekaran Srikanth-A12788 [mailto:Srikanth.Chandrasekaran@freescale.com] Sent: Tuesday, July 26, 2005 3:25 PM To: Muranyi, Arpad; verilog-ams@eda.org Subject: RE: SPICE compatibility issues Arpad, I am assuming the various flavours of spice will differ not much in the behaviour but more so in the name of the primitives in the different spice implementation including the parameter names that they take in etc. If that is the case then we can hopefully standardize on a Verilog-AMS library for the spice models. The reason we had to include the tool dependency when including spice primitives inside Verilog-AMS for this reason. We didn't want the language to be seen as standardizing spice names that have already been implemented in various circuit simulators. But, if you think there is lot of difference in the different spice flavours apart from syntax, names and naming conventions then it might become difficult to have a standardized Verilog-AMS library. Having multiple libraries corresponding to various flavours of spice would be very unmaintanable. Regards, SriReceived on Tue Jul 26 16:27:17 2005
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