Minutes of the Verilog-AMS committee call: 12 May 2008

From: Sri Chandra <sri.chandra_at_.....>
Date: Mon May 12 2008 - 11:00:30 PDT
Date: 12 May 2008

Geoffrey, Analog Devices
Marek Mierzwinski, Tiburon
Martin O'Leary, Cadence
Jonathan David, Qualcomm
Stu Sutherland, Sutherland HDL
Dave Miller, Freescale
Marq Kole, NXP
Dave Cronauer, Synopsys
Sri Chandra, Freescale

* [Author List]: Jonathan David's affiliation to be changed to Qualcomm Inc.

* [clause 3.4.1, Page 41]: 1364 does not error when string is assigned 
to integer variables. The error message should be specified only for 
assigning string values to reals.

* [syntax 4-2, page 75]: ac_stim, and noise_functions should be 
separated out to its own syntax item, and need not not have the same 
restrictions as filter functions (analog_small_signal_function_call 
which will include ac_stim, white_noise, flicker_noise and noise_table)
   - The new syntax item is specified in 
http://www.eda-stds.org/mantis/view.php?id=2324
   - Remove the above from syntax 4-2, and move the new syntax item as 
part of section 4.6.4 (without ac_stim; ac_stim is described by the 
general form)
   - analog_small_signal_function_call should be added to the "primary" 
in A.8.4
   - Also analog_built_in_function_call should be added to the "primary" 
in A.8.4 (http://www.eda-stds.org/mantis/view.php?id=2323)

* [clause 6.4, page 142]: change nmos to nmos3 in the paramset example, 
and remove assignment of .level=3 from the parameter assignment list. 
Keep the name nmos in the .model card spice definition in that section.

* [clause 6.4.1, page 143]: change nmos to nmos3 on the paramset example.

* [clause 6.7.1, page 159]: Discussion on OOMR on parameters. Currently 
its decided to leave this section as it is in the current draft version.

* [clause 10.6, page 257]: Add an example for keywords that is no longer 
keyword in the current version.

`begin_keywords "VAMS-2.3"
module a2d(dnet, anet);
   input dnet;
   wire dnet;
   logic dnet;
   output anet;
   electrical anet;
   real AnalogVar;

   analog begin
     ...
   end
endmodule
`end_keywords

* [Annex D.1, page 361]: semicolon missing after discipline, nature names
   - semicolon missing after domain discrete for discipline ddiscrete in D.1
   - semicolon has also been introduced after the discipline and nature 
names in LRM2.3 to make it consistent with connectrules, module etc.
   - The semicolon after discipline/nature names would be made optional 
in 2.3 to keep it backward compatible in the BNF in A.1.6 and A.1.7.
	nature nature_identifier [ : parent_nature ] [ ; ]
	discipline discipline_identifier [;]
   - The examples would be changed to have semicolon after the 
discipline and nature names as that is the recommended usage in 2.3 (the 
usage with ; is for backwards compatibility)

* [Annex D.3, page 366]
   - Add guard for driver_access.vams:
     `ifdef DRIVER_ACCESS_VAMS
     `else
     `define DRIVER_ACCESS_VAMS 1
        ...
     `endif

* [Annex G, page 379]: This will be reviewed and updated as part of 
draft4-prelim2 review and updated.

* [Annex H.4, page 386]: Marq Kole will have a look at the changes done 
post draf1 of LRM2.3 and include them in the table. Marq will send the 
updated table to Stu

* It was decided that due to the difficulty in including the index, 
maintaining and effort required it was decided to leave it out of the 
LRM. Also apparently Accellera does not require index as part of pdf, 
possibly due to the search facilities available with pdf.

* Next review
   - Prelim2 version will include the changes in the document and if 
available before May 15th, will be reviewed as part of the May 15th call.

Prelim3 is currently planned to the final version and the official 
draft4 version. This will be without change bars and will be clean 
version that will be submitted to the board for approval hopefully by 
early next week.

Regards,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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