Re: Minutes of the Verilog-AMS committee call: 12 May 2008

Sri Chandra wrote:
> * [clause 10.6, page 257]: Add an example for keywords that is no longer 
> keyword in the current version.
> 
> `begin_keywords "VAMS-2.3"
> module a2d(dnet, anet);
>   input dnet;
>   wire dnet;
>   logic dnet;
>   output anet;
>   electrical anet;
>   real AnalogVar;
> 
>   analog begin
>     ...
>   end
> endmodule
> `end_keywords


Let's not repeat this error: it's "avar" not "AnalogVar"; we've
had a few passes trying to clean up that example ...

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.