| Title |
Size |
 XAPP119: Adapting ASIC Designs for Use with Spartan® FPGAs |
50 KB
|
| XAPP120: How Spartan Series FPGAs Compete for Gate Array Production |
50 KB
|
| Spartan-XL Family |
|
| XAPP125: Conserving Power With Auto Power Down Mode in Spartan-XL FPGAs |
20 KB
|
| XAPP124: Using Manual Power Down Mode With Spartan-XL FPGAs |
20 KB
|
| XAPP123: Using Three-State Enable Registers in XC4000XLA and Spartan-XL FPGAs |
40 KB
|
| XAPP088: I/O Characteristics of the 'XL FPGAs |
30 KB
|
| SelectRAM Memory |
|
| XAPP065: Edge-Triggered and Dual-Port RAM Capability |
50 KB |
| XAPP057: Using SelectRAM Memory in FPGAs |
210 KB |
| XAPP053: Implementing FIFOs in RAM |
230 KB |
| XAPP051: Synchronous and Asynchronous FIFO Designs |
140 KB |
XAPP052: Efficient Shift Registers, LFSR Counters,
and Long Pseudo-Random Sequence Generators |
70 KB |
| Carry Logic |
|
| XAPP013: Using the Dedicated Carry Logic |
100 KB |
| XAPP023: Accelerating Loadable Counters |
30 KB |
| XAPP018: Estimating the Performance of Adders and Counters |
40 KB |
| XAPP014: Ultra-Fast Synchronous Counters |
40 KB |
| XAPP027: Implementing State Machines in FPGA Devices |
30 KB |
| Digital Signal Processing |
|
| Configuration |
|
| XAPP079: Configuring Xilinx FPGAs Using an XC9500 CPLD and Parallel PROM |
100 KB
|
| XAPP126: Data Generation and Configuration for Spartan Series FPGAs |
80 KB
|
| XAPP098: The Low-Cost, Efficient Serial Configuration of Spartan FPGAs |
100 KB
|
| XAPP122: The Express Configuration of Spartan-XL FPGAs |
90 KB
|
| XAPP091: Configuring Mixed FPGA Daisy Chains |
20 KB |
| XAPP015: Using the Readback Capability |
60 KB |
| XAPP017: Boundary Scan in Xilinx Devices |
110 KB |
