Available Report Types

You can generate the following types of reports:

Report Type	Supported Families	Report Contents
Status Report	All	Provides information about Designer, Device Data, and variable settings for the design.
Timing Report using Timer	SX, MX, 3200DX, ACT3, ACT2, and ACT1	Displays summarized timing delays for paths.
Pin Report	All	Creates a text list of the I/O signal locations on a device. You can generate a pin report sorted by I/O signal names or by package number.
Flip Flop Report	All	Creates a report that lists the number and type of flip-flops (sequential or CC, which are flip-flops made of 2 combinatorial macros) used in a design. The flip-flop report can be of two types: Summary or Extended. Both types of reports include the Flip-Flop type, sequential (Seq) or combinatorial (CC), the Library name, and the Total number of Seq and CC Flip-Flops in the design. The Summary Report also includes the Number of instances of each unique type. The Extended Report provides the Macro name. All Reports are output to an editable window for viewing, modifying, saving, and printing.
Power Report	ProASICPLUS, Axcelerator, ProASIC, and ProaSIC3/E	Enables you to quickly determine if any power consumption problems exist in your design. The power report lists the following information: - Global device information and SmartPower Preferences selection information - Design level static power summary - Dynamic power summary - Hierarchical detailed power report (including gates, blocks, and nets), with a block by block, gate by gate, and net by net power summary SmartPower results.
Timing Violations Report using Timer	SX, MX, 3200DX, ACT3, ACT2, and ACT1	Enables you to obtain constraint results sorted by slack. You can now view Max Delay violations as well as Min Delay violations in the report.
I/O Bank Report	Axcelerator, and ProASIC3/E	Provides information on the I/O functionality, I/O technologies, I/O banks and I/O voltages.
Global Usage Report	ProASICPLUS, and ProASIC	Provides information about the net(s) that are assigned or routed using Global or LocalClock resources.
Timing Report using SmartTime	ProASIC3/E, ProASICPLUS, Axcelerator, ProASIC, eX, and SX-A	Provides a text report with the timing information organized by clock domain as in the GUI.
Timing Violations Report using SmartTime	ProASIC3/E, ProASICPLUS, Axcelerator, ProASIC, eX, and SX-A	Provides a flat slack report centered around constraint violations.