/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
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/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
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/* registered trademarks of Sun Microsystems, Inc. in the United States and */
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/******************************************************************************/
// @(#)areginexact.v 1.1 4/7/92
//
module AregInexact
(RomInexactRound, SNnotDB,
AMCBit, AM32, AM3, notAM31_3, notAM2_0,
Inexact);
input RomInexactRound
;
input SNnotDB
;
input AMCBit
, AM32
, AM3
, notAM31_3
, notAM2_0
;
output Inexact
;
//Inexact = (AM[0:2] != 0) or (SNnotDB and ((AM[32] & AMCbit) or AM[31:3]))
// or (DBnotSN and ((AM[3] & AMCbit)))
// InexactSN = PostNormBy1SNBit | AM31_19 | AM18_3 | AM2_0
// InexactDB = PostNormBy1DBBit | AM2_0
ME_NAND2 aig2 (AMCBit, AM32, notPostNormBy1SNBit
);
ME_NAND2 aig3 (AMCBit, AM3, notPostNormBy1DBBit
);
ME_NAND2 aig12 (notPostNormBy1DBBit, notAM2_0, UInexactDB
);
ME_NAND2 g_0 (UInexactDB, RomInexactRound, notInexactDB
);
ME_NAND3 aig13 (notPostNormBy1SNBit, notAM2_0, notAM31_3, UInexactSN
);
ME_NAND2 g_1 (UInexactSN, RomInexactRound, notInexactSN
);
ME_NMUX2B aig14 (SNnotDB, notInexactDB, notInexactSN, Inexact);
endmodule
This page: |
Created: | Thu Aug 19 12:03:34 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_ctl/rtl/areginexact.v
|