/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
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/******************************************************************************/
// @(#)areglsblog.v 1.1 4/7/92
//
module AregLSBLog
(AregSticky,
AregLSBSN,
AregLSBDB,
AregFPMSBP1,
SNnotDB,
TrueIEEEAregLSB,
StickyForSR1);
input [1:0] AregSticky
; // Two LSBs of Areg
input [1:0] AregLSBSN
; // Two LSBs of Areg for IEEE single length
input [1:0] AregLSBDB
; // Two LSBs of Areg for IEEE double length
input AregFPMSBP1
; // Fraction overflow bit (ie 4.0 < Areg =< 2.0)
input SNnotDB
;
output TrueIEEEAregLSB
;
output StickyForSR1
;
ME_OR2 v1 (AregSticky[1], AregSticky[0], StickyForSR1);
ME_MUX4B asdf (SNnotDB, AregFPMSBP1,
AregLSBDB[0], AregLSBSN[0],
AregLSBDB[1], AregLSBSN[1],
TrueIEEEAregLSB);
endmodule
| This page: |
Created: | Thu Aug 19 11:59:33 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_frac/rtl/areglsblog.v
|