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/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
/*                                                                            */ 
/* The contents of this file are subject to the current version of the Sun    */ 
/* Community Source License, microSPARCII ("the License"). You may not use    */ 
/* this file except in compliance with the License.  You may obtain a copy    */ 
/* of the License by searching for "Sun Community Source License" on the      */ 
/* World Wide Web at http://www.sun.com. See the License for the rights,      */ 
/* obligations, and limitations governing use of the contents of this file.   */ 
/*                                                                            */ 
/* Sun Microsystems, Inc. has intellectual property rights relating to the    */ 
/* technology embodied in these files. In particular, and without limitation, */ 
/* these intellectual property rights may include one or more U.S. patents,   */ 
/* foreign patents, or pending applications.                                  */ 
/*                                                                            */ 
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos,   */ 
/* Solaris, Java and all Java-based trademarks and logos are trademarks or    */ 
/* registered trademarks of Sun Microsystems, Inc. in the United States and   */ 
/* other countries. microSPARC is a trademark or registered trademark of      */ 
/* SPARC International, Inc. All SPARC trademarks are used under license and  */ 
/* are trademarks or registered trademarks of SPARC International, Inc. in    */ 
/* the United States and other countries. Products bearing SPARC trademarks   */ 
/* are based upon an architecture developed by Sun Microsystems, Inc.         */ 
/*                                                                            */ 
/******************************************************************************/ 
/***************************************************************************
****************************************************************************
***
***  Program File:  @(#)clkbuf_c.v
***
****************************************************************************
****************************************************************************/

module clkbuf_c (
    rcc_clk_unbuf,
    rcc_clk_c,

    sboclk_unbuf,
    sboclk_c,

    rfr_clock_unbuf,
    rfr_clock_c,

    rfr_late_unbuf,
    rfr_late_c,

    //sbus_clk_unbuf,
    //sbus_clk,

    gclk_unbuf,
    gclk,

    ss_clock_unbuf,
    ss_clock_t,
    ss_clock_b,
    ss_clock_l,
    ss_clock_r,
    ss_clock,
    ref_clk
) ;
    input rcc_clk_unbuf ;
    output rcc_clk_c ;

    input sboclk_unbuf ;
    output sboclk_c ;

    input rfr_clock_unbuf ;
    output rfr_clock_c ;

    input rfr_late_unbuf ;
    output rfr_late_c ;

    //input sbus_clk_unbuf ;
    //output sbus_clk ;

    input gclk_unbuf ;
    output gclk ;

    input ss_clock_unbuf ;
    output ss_clock_t ;
    output ss_clock_b ;
    output ss_clock_l ;
    output ss_clock_r ;
    output ss_clock ; 		//6-5-95  adding pass through for ss_clock
    output ref_clk ;

    // Delay all the clocks by a couple of ticks to create intentional races
    //     in the clk_cntl->misc paths - see Bug 597 fix.
    wire #2 ss_clock_dly = ss_clock_unbuf ;
    wire #2 rcc_clk_dly = rcc_clk_unbuf ;
    wire #2 sboclk_dly = sboclk_unbuf ;
    wire #2 rfr_clock_dly = rfr_clock_unbuf ;
    wire #2 rfr_late_dly = rfr_late_unbuf ;
    //wire #2 sbus_clk_dly = sbus_clk_unbuf ;
    wire #2 gclk_dly = gclk_unbuf ;

// 6-5-96 : add pass through for unbuffered ss_clock to top level. 
    wire #2 ss_clock = ss_clock_unbuf ;   

    ACALLBUF buffers(
	.SS_CLK		(ss_clock_dly),
	.RFR_CLK	(rfr_clock_dly),
	.RFR_LATE	(rfr_late_dly),
	.RCC_CLK	(rcc_clk_dly),
	//.SBUS_CLK	(sbus_clk_dly),
	.SBOCLK		(sboclk_dly),
	.GCLK		(gclk_dly),
	.SS_CLK_T	(ss_clock_t),
	.SS_CLK_L	(ss_clock_l),
	.SS_CLK_B	(ss_clock_b),
	.SS_CLK_R	(ss_clock_r),
	.RFR_CLK_D	(rfr_clock_c),
	.RFR_LATE_D	(rfr_late_c),
	.GCLK_I		(gclk),
	.REF_CLK_I	(ref_clk),
	.SBOCLK_S	(sboclk_c),
	//.SBUS_CLK_I	(sbus_clk),
	.RCC_CLK_M	(rcc_clk_c)
    ) ;

// Added spare cells 

        spares  clkbuf_c_spares ();

endmodule
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This page: Created:Thu Aug 19 12:00:11 1999
From: ../../../sparc_v8/ssparc/clkbuf/rtl/clkbuf_c.v

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