/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
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/*                                                                            */ 
/******************************************************************************/ 
// This module will have spare cells 
// to be used if needed

`timescale 1 ns / 1 ns


module spares ;

// tie the next inputs with previous outputs

AND2A spare_and1 (and_out1, 1'b0, 1'b0) ;
AND2A spare_and2 (and_out2, and_out1, and_out1 ) ;
AND2A spare_and3 (and_out3, and_out2, and_out2 ) ;
AND2A spare_and4 (and_out4, and_out3, and_out3 ) ;
AND2A spare_and5 (and_out5, and_out4, and_out4 ) ;
AND2A spare_and6 (and_out6, and_out5, and_out5 ) ;
AND2A spare_and7 (and_out7, and_out6, and_out6 ) ;
AND2A spare_and8 (and_out8, and_out7, and_out7 ) ;
AND2A spare_and9 (and_out9, and_out8, and_out8) ;
AND2A spare_and10 (and_out10, and_out9, and_out9) ;

OR2A spare_or1 (or_out1, and_out10, and_out10) ;
OR2A spare_or2 (or_out2, or_out1, or_out1) ;
OR2A spare_or3 (or_out3, or_out2, or_out2) ; 
OR2A spare_or4 (or_out4, or_out3, or_out3) ; 
OR2A spare_or5 (or_out5, or_out4, or_out4) ; 
OR2A spare_or6 (or_out6, or_out5, or_out5) ;
OR2A spare_or7 (or_out7, or_out6, or_out6) ;
OR2A spare_or8 (or_out8, or_out7, or_out7) ;
OR2A spare_or9 (or_out9, or_out8, or_out8) ;
OR2A spare_or10 (or_out10, or_out9, or_out9) ;

AO22A spare_andor1 (andor_out1, or_out10, or_out10, or_out10, or_out10) ;
AO22A spare_andor2 (andor_out2, andor_out1, andor_out1, andor_out1, andor_out1) ; 
AO22A spare_andor3 (andor_out3, andor_out2, andor_out2, andor_out2, andor_out2) ; 
AO22A spare_andor4 (andor_out4, andor_out3, andor_out3, andor_out3, andor_out3) ; 
AO22A spare_andor5 (andor_out5, andor_out4, andor_out4, andor_out4, andor_out4) ; 
AO22A spare_andor6 (andor_out6, andor_out5, andor_out5, andor_out5, andor_out5) ;
AO22A spare_andor7 (andor_out7, andor_out6, andor_out6, andor_out6, andor_out6) ;
AO22A spare_andor8 (andor_out8, andor_out7, andor_out7, andor_out7, andor_out7) ;
AO22A spare_andor9 (andor_out9, andor_out8, andor_out8, andor_out8, andor_out8) ;
AO22A spare_andor10 (andor_out10, andor_out9, andor_out9, andor_out9, andor_out9) ;

ENA spare_xnor1 (xnor_out1, andor_out10, andor_out10) ;
ENA spare_xnor2 (xnor_out2, xnor_out1, xnor_out1) ; 
ENA spare_xnor3 (xnor_out3, xnor_out2, xnor_out2) ; 
ENA spare_xnor4 (xnor_out4, xnor_out3, xnor_out3) ; 
ENA spare_xnor5 (xnor_out5, xnor_out4, xnor_out4) ; 
ENA spare_xnor6 (xnor_out6, xnor_out5, xnor_out5) ;
ENA spare_xnor7 (xnor_out7, xnor_out6, xnor_out6) ;
ENA spare_xnor8 (xnor_out8, xnor_out7, xnor_out7) ;
ENA spare_xnor9 (xnor_out9, xnor_out8, xnor_out8) ;
ENA spare_xnor10 (xnor_out10, xnor_out9, xnor_out9) ;

// tie all the clocks to the same logic 0 net so
// that they could be chained if necessary
FD1QA spare_Mflipflop1 (ff_out1, xnor_out10, and_out1) ;
FD1QA spare_Mflipflop2 (ff_out2, ff_out1, and_out1) ; 
FD1QA spare_Mflipflop3 (ff_out3, ff_out2, and_out1) ; 
FD1QA spare_Mflipflop4 (ff_out4, ff_out3, and_out1) ; 
FD1QA spare_Mflipflop5 (ff_out5, ff_out4, and_out1) ; 
FD1QA spare_Mflipflop6 (ff_out6, ff_out5, and_out1) ;
FD1QA spare_Mflipflop7 (ff_out7, ff_out6, and_out1) ;
FD1QA spare_Mflipflop8 (ff_out8, ff_out7, and_out1) ;
FD1QA spare_Mflipflop9 (ff_out9, ff_out8, and_out1) ;
FD1QA spare_Mflipflop10 (ff_out10, ff_out9, and_out1) ;

endmodule