/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
/* are trademarks or registered trademarks of SPARC International, Inc. in */
/* the United States and other countries. Products bearing SPARC trademarks */
/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
`timescale 1ns/100ps
/***************************************************************************
****************************************************************************
***
*** Program File: @(#)flops.v
***
***
*** Description:
*** This is the module which contains flops for falcon_core
*** timing fixes .
***
****************************************************************************
****************************************************************************/
module flops
( gclk,
pci_clk,
pci_clk_, // add input clock port per request
reset,
DBEnable1,
DBEnable2,
reset_l_reg,
reset_reg,
rstnn,
pcic_db_oen,
pcic_afxm_db_oen);
input gclk
;
input pci_clk
;
input pci_clk_
;
input reset
;
input DBEnable1
;
input DBEnable2
;
output reset_l_reg
;
output[1:0] reset_reg
;
output rstnn
;
output pcic_db_oen
;
output pcic_afxm_db_oen
;
reg reset_l_reg;
reg [1:0] reset_reg;
reg pcic_db_oen;
reg pcic_afxm_db_oen;
always @(posedge gclk)
begin
reset_l_reg <= #1 ~reset;
reset_reg <= #1 {reset,reset};
pcic_db_oen <= #1 (DBEnable1 | DBEnable2);
pcic_afxm_db_oen <= #1 DBEnable2;
end
sync sync1( .out (rstnn),
.in_clk (pci_clk_),
.out_clk(pci_clk),
.in (reset_l_reg)
);
endmodule
This page: |
Created: | Thu Aug 19 12:00:28 1999 |
| From: |
../../../sparc_v8/ssparc/pcic/flops/rtl/flops.v
|