/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
/* are trademarks or registered trademarks of SPARC International, Inc. in */
/* the United States and other countries. Products bearing SPARC trademarks */
/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
// @(#)lengthlogic.v 1.1 4/7/92
//
module LengthLogic
(Phi, Reset,
FpInst1,
FpLd,
FpOp,
RomToggleLength,
notAbortWB,
OprSNnotDB,
BuffSNnotDB,
U_SNnotDB,
DBnotSN,
MulLenSel);
input Phi
, Reset
,
FpInst1
, FpLd
, FpOp
, RomToggleLength
, notAbortWB
;
output OprSNnotDB
,
U_SNnotDB
,
DBnotSN
,
BuffSNnotDB
;
output [4:0]MulLenSel
;
/* *************************************** */
/* Operand Length Logic */
/* *************************************** */
// MUX to FpInst if FpOp
// else used FpInst from previous cycle (original code)
// ME_FD1_B crg1 (Phi, FpInst1, notOprSNnotDBL, );
// ME_MUX2B_B mlen (FpOp, notOprSNnotDBL, FpInst1, notOprSNnotDB);
// timing fix -- dhn 04/15/91 -- this will only work if FpLd is
// always asserted 1 cycle after FpOp, never simultaneously
ME_FD1_B crg1 (Phi, FpInst1, notOprSNnotDB
, );
ME_INV_C new0 (notOprSNnotDB, OprSNnotDB);
/* *************************************** */
/* Length Latch */
/* *************************************** */
ME_AND2 rmg3 (RomToggleLength, notAbortWB, LenFromnotLen
);
ME_OR3 ell (FpLd, LenFromnotLen, Reset, Enable
);
ME_NOR2 cllr (SNnotDB
, Reset, notResetSNnotDB
);
ME_NMUX2B lm (FpLd, notResetSNnotDB, OprSNnotDB, notMuxedLength
);
ME_NMUX2B llm (Enable, DBnotSNb
, notMuxedLength, U_SNnotDB);
ME_INVA lli (U_SNnotDB, U_DBnotSN
);
ME_FD1_B llf (Phi, U_SNnotDB, SNnotDB, DBnotSNb);
ME_FD1_B lif (Phi, U_DBnotSN, DBnotSN, );
ME_FD1_B lig (Phi, U_DBnotSN, DBnotSNa
, ); // goes only to
ME_INV_C llb (DBnotSNa, BuffSNnotDB); // High drive version
ME_FD1_B llf0 (Phi, U_SNnotDB, MulLenSel[0], );
ME_FD1_B llf1 (Phi, U_SNnotDB, MulLenSel[1], );
ME_FD1_B llf2 (Phi, U_SNnotDB, MulLenSel[2], );
ME_FD1_B llf3 (Phi, U_SNnotDB, MulLenSel[3], );
ME_FD1_B llf4 (Phi, U_SNnotDB, MulLenSel[4], );
endmodule
This page: |
Created: | Thu Aug 19 11:57:41 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_ctl/rtl/lengthlogic.v
|