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//  @(#)mulselctl.v	1.1  4/7/92
//
[Up: MultiplierLSB m13][Up: MultiplierLSB m12][Up: MultiplierLSB m11][Up: MultiplierLSB m10]
module MulSelCtl (notMult, Shifted, Pos, Zero, ACI);
               
input [2:0] notMult;
output Shifted, Zero, Pos, ACI;
//
// Mult 0 0 0 
// ACI is Actual Carry In
// Shifted is 1

ME_XOR2_B xnr7 (notMult[1], notMult[0], Shifted);

/* Feedthrough */
/* wire Negative = Mult[2]; */
con1 g00 (notMult[2], Pos);

ME_INV_A g01 (notMult[2], Negative);

// assert ACI if subtracting
ME_OR2_B cz1 (notMult[0], notMult[1], notSwig);
ME_AND2  cz2  (Negative, notSwig, ACI);		// 2 gates

//ME_INV_B g02 (Negative, notMult2);
// all ones or all zeros gives zero
ME_OR3_B nzr5 (notMult[2], notMult[0], notMult[1], notPos0);
ME_NAND3 nzr6 (notMult[2], notMult[1], notMult[0], notNeg0);
ME_NAND2_B nzr8 (notNeg0, notPos0,          Zero);

endmodule
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This page: Created:Thu Aug 19 12:03:41 1999
From: ../../../sparc_v8/ssparc/fpu/fp_ctl/rtl/mulselctl.v

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