ME_NMUX_2Bbit g11 ( notA, A, D0[1], D1[1], Xout[1] );
ME_NMUX_2Bbit g12 ( notA, A, D0[2], D1[2], Xout[2] );
ME_NMUX_2Bbit g13 ( notA, A, D0[3], D1[3], Xout[3] );
ME_NMUX_2Bbit g14 ( notA, A, D0[4], D1[4], Xout[4] );
ME_NMUX_2Bbit g15 ( notA, A, D0[5], D1[5], Xout[5] );
ME_NMUX_2Bbit g16 ( notA, A, D0[6], D1[6], Xout[6] );
ME_NMUX_2Bbit g17 ( notA, A, D0[7], D1[7], Xout[7] );
endmodule
![[Up: MIptrMultiplexor g2]](v2html-up.gif)
module ME_NMUX_2B_8
(A, D0, D1, Xout);
input A ;
input [7:0] D0, D1 ;
output [7:0] Xout ;
ME_INV_B g10 ( A, notA1 ) ;
ME_INV_B g11 ( notA1, Abuf ) ;
ME_INV_B g12 ( A, notAbuf ) ;
ME_NMUX_2Bbyte m13 ( notAbuf, Abuf, D0[7:0], D1[7:0], Xout[7:0] ) ;
endmodule
module ME_MUX_2B_32 ( A, D0, D1, Xout );
input A ;
input [31:0] D0, D1 ;
output [31:0] Xout ;
ME_INV_B g10 ( A, _A ) ;
ME_INV_C g11 ( _A, buffA ) ;
ME_INV_C g12 ( A, notA ) ;
ME_MUX_2Bbyte m10 ( notA, buffA, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2Bbyte m11 ( notA, buffA, D0[15:8], D1[15:8], Xout[15:8] ) ;
ME_MUX_2Bbyte m12 ( notA, buffA, D0[23:16], D1[23:16], Xout[23:16] ) ;
ME_MUX_2Bbyte m13 ( notA, buffA, D0[31:24], D1[31:24], Xout[31:24] ) ;
endmodule
module ME_MUX_2B_52 ( A, D0, D1, Xout );
input A ;
input [51:0] D0, D1 ;
output [51:0] Xout ;
ME_INV_B g10 ( A, _A ) ;
ME_INV_C g11 ( _A, buffA ) ;
ME_INV_C g12 ( A, notA ) ;
ME_MUX_2Bbyte m10 ( notA, buffA, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2Bbyte m11 ( notA, buffA, D0[15:8], D1[15:8], Xout[15:8] ) ;
ME_MUX_2Bbyte m12 ( notA, buffA, D0[23:16], D1[23:16], Xout[23:16] ) ;
ME_MUX_2Bbyte m13 ( notA, buffA, D0[31:24], D1[31:24], Xout[31:24] ) ;
ME_MUX_2Bbyte m14 ( notA, buffA, D0[39:32], D1[39:32], Xout[39:32] ) ;
ME_MUX_2Bbyte m15 ( notA, buffA, D0[47:40], D1[47:40], Xout[47:40] ) ;
ME_MUX_2Bbit m16 ( notA, buffA, D0[48], D1[48], Xout[48] ) ;
ME_MUX_2Bbit m17 ( notA, buffA, D0[49], D1[49], Xout[49] ) ;
ME_MUX_2Bbit m18 ( notA, buffA, D0[50], D1[50], Xout[50] ) ;
ME_MUX_2Bbit m19 ( notA, buffA, D0[51], D1[51], Xout[51] ) ;
endmodule
module ME_MUX_2B_4 ( A, D0, D1, Xout );
input A ;
input [3:0] D0, D1 ;
output [3:0] Xout ;
ME_BUFF g10 ( A, buffA ) ;
ME_INV_B g11 ( A, notA ) ;
ME_MUX_2Bbit m10 ( notA, buffA, D0[0], D1[0], Xout[0] ) ;
ME_MUX_2Bbit m11 ( notA, buffA, D0[1], D1[1], Xout[1] ) ;
ME_MUX_2Bbit m12 ( notA, buffA, D0[2], D1[2], Xout[2] ) ;
ME_MUX_2Bbit m13 ( notA, buffA, D0[3], D1[3], Xout[3] ) ;
endmodule
module ME_MUX_2B_3 ( A, D0, D1, Xout );
input A ;
input [2:0] D0, D1 ;
output [2:0] Xout ;
ME_BUFF g10 ( A, buffA ) ;
ME_INV_B g11 ( A, notA ) ;
ME_MUX_2Bbit m10 ( notA, buffA, D0[0], D1[0], Xout[0] ) ;
ME_MUX_2Bbit m11 ( notA, buffA, D0[1], D1[1], Xout[1] ) ;
ME_MUX_2Bbit m12 ( notA, buffA, D0[2], D1[2], Xout[2] ) ;
endmodule
module ME_MUX_2B_2 ( A, D0, D1, Xout );
input A ;
input [1:0] D0, D1 ;
output [1:0] Xout ;
ME_BUFF g10 ( A, buffA ) ;
ME_INV_B g11 ( A, notA ) ;
ME_MUX_2Bbit m10 ( notA, buffA, D0[0], D1[0], Xout[0] ) ;
ME_MUX_2Bbit m11 ( notA, buffA, D0[1], D1[1], Xout[1] ) ;
endmodule
module ME_MUX_2B_B_58 ( A, D0, D1, Xout );
input A ;
input [57:0] D0, D1 ;
output [57:0] Xout ;
ME_INV_B g10 ( A, _A ) ;
ME_INV_C g11 ( _A, buffA1 ) ;
ME_INV_C g12 ( _A, buffA2 ) ;
ME_INV_C g13 ( A, notA ) ;
ME_MUX_2B_Bbyte m10 ( notA, buffA1, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2B_Bbyte m11 ( notA, buffA1, D0[15:8], D1[15:8], Xout[15:8] ) ;
ME_MUX_2B_Bbyte m12 ( notA, buffA1, D0[23:16], D1[23:16], Xout[23:16] ) ;
ME_MUX_2B_Bbyte m13 ( notA, buffA1, D0[31:24], D1[31:24], Xout[31:24] ) ;
ME_MUX_2B_Bbyte m14 ( notA, buffA2, D0[39:32], D1[39:32], Xout[39:32] ) ;
ME_MUX_2B_Bbyte m15 ( notA, buffA2, D0[47:40], D1[47:40], Xout[47:40] ) ;
ME_MUX_2B_Bbyte m16 ( notA, buffA2, D0[55:48], D1[55:48], Xout[55:48] ) ;
ME_MUX_2B_Bbit m17 ( notA, buffA2, D0[56], D1[56], Xout[56] ) ;
ME_MUX_2B_Bbit m18 ( notA, buffA2, D0[57], D1[57], Xout[57] ) ;
endmodule
module ME_MUX_2B_58 ( A, D0, D1, Xout );
input A ;
input [57:0] D0, D1 ;
output [57:0] Xout ;
ME_INV_B g10 ( A, _A ) ;
ME_INV_C g11 ( _A, buffA1 ) ;
ME_INV_C g12 ( _A, buffA2 ) ;
ME_INV_C g13 ( A, notA ) ;
ME_MUX_2Bbyte m10 ( notA, buffA1, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2Bbyte m11 ( notA, buffA1, D0[15:8], D1[15:8], Xout[15:8] ) ;
ME_MUX_2Bbyte m12 ( notA, buffA1, D0[23:16], D1[23:16], Xout[23:16] ) ;
ME_MUX_2Bbyte m13 ( notA, buffA1, D0[31:24], D1[31:24], Xout[31:24] ) ;
ME_MUX_2Bbyte m14 ( notA, buffA2, D0[39:32], D1[39:32], Xout[39:32] ) ;
ME_MUX_2Bbyte m15 ( notA, buffA2, D0[47:40], D1[47:40], Xout[47:40] ) ;
ME_MUX_2Bbyte m16 ( notA, buffA2, D0[55:48], D1[55:48], Xout[55:48] ) ;
ME_MUX_2Bbit m17 ( notA, buffA2, D0[56], D1[56], Xout[56] ) ;
ME_MUX_2Bbit m18 ( notA, buffA2, D0[57], D1[57], Xout[57] ) ;
endmodule
module ME_NMUX_2B_57 ( A, D0, D1, Xout );
input A ;
input [56:0] D0, D1 ;
output [56:0] Xout ;
ME_INV_B g10 ( A, _A ) ;
ME_INV_C g11 ( _A, buffA1 ) ;
ME_INV_C g12 ( _A, buffA2 ) ;
ME_INV_C g13 ( A, notA ) ;
ME_INV_C g14 ( A, notA2 ) ;
ME_NMUX_2Bbyte m10 ( notA, buffA1, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_NMUX_2Bbyte m11 ( notA, buffA1, D0[15:8], D1[15:8], Xout[15:8] ) ;
ME_NMUX_2Bbyte m12 ( notA, buffA1, D0[23:16], D1[23:16], Xout[23:16] ) ;
ME_NMUX_2Bbyte m13 ( notA, buffA1, D0[31:24], D1[31:24], Xout[31:24] ) ;
ME_NMUX_2Bbyte m14 ( notA2, buffA2, D0[39:32], D1[39:32], Xout[39:32] ) ;
ME_NMUX_2Bbyte m15 ( notA2, buffA2, D0[47:40], D1[47:40], Xout[47:40] ) ;
ME_NMUX_2Bbyte m16 ( notA2, buffA2, D0[55:48], D1[55:48], Xout[55:48] ) ;
ME_NMUX_2Bbit m17 ( notA2, buffA2, D0[56], D1[56], Xout[56] ) ;
endmodule
module ME_NMUX_2B_58 ( A, D0, D1, Xout );
input A ;
input [57:0] D0, D1 ;
output [57:0] Xout ;
ME_INV_B g10 ( A, _A ) ;
ME_INV_C g11 ( _A, buffA1 ) ;
ME_INV_C g12 ( _A, buffA2 ) ;
ME_INV_C g13 ( A, notA ) ;
ME_INV_C g14 ( A, notA2 ) ;
ME_NMUX_2Bbyte m10 ( notA, buffA1, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_NMUX_2Bbyte m11 ( notA, buffA1, D0[15:8], D1[15:8], Xout[15:8] ) ;
ME_NMUX_2Bbyte m12 ( notA, buffA1, D0[23:16], D1[23:16], Xout[23:16] ) ;
ME_NMUX_2Bbyte m13 ( notA, buffA1, D0[31:24], D1[31:24], Xout[31:24] ) ;
ME_NMUX_2Bbyte m14 ( notA2, buffA2, D0[39:32], D1[39:32], Xout[39:32] ) ;
ME_NMUX_2Bbyte m15 ( notA2, buffA2, D0[47:40], D1[47:40], Xout[47:40] ) ;
ME_NMUX_2Bbyte m16 ( notA2, buffA2, D0[55:48], D1[55:48], Xout[55:48] ) ;
ME_NMUX_2Bbit m17 ( notA2, buffA2, D0[56], D1[56], Xout[56] ) ;
ME_NMUX_2Bbit m18 ( notA2, buffA2, D0[57], D1[57], Xout[57] ) ;
endmodule
module ME_MUX_2B_64 ( A, D0, D1, Xout );
input A ;
input [63:0] D0, D1 ;
output [63:0] Xout ;
ME_BUF_B g10 ( A, _A ) ;
ME_BUF_C g11 ( _A, buffA1 ) ;
ME_BUF_C g12 ( _A, buffA2 ) ;
ME_INV_C g13 ( A, notA ) ;
ME_MUX_2Bbyte m10 ( notA, buffA1, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2Bbyte m11 ( notA, buffA1, D0[15:8], D1[15:8], Xout[15:8] ) ;
ME_MUX_2Bbyte m12 ( notA, buffA1, D0[23:16], D1[23:16], Xout[23:16] ) ;
ME_MUX_2Bbyte m13 ( notA, buffA1, D0[31:24], D1[31:24], Xout[31:24] ) ;
ME_MUX_2Bbyte m14 ( notA, buffA2, D0[39:32], D1[39:32], Xout[39:32] ) ;
ME_MUX_2Bbyte m15 ( notA, buffA2, D0[47:40], D1[47:40], Xout[47:40] ) ;
ME_MUX_2Bbyte m16 ( notA, buffA2, D0[55:48], D1[55:48], Xout[55:48] ) ;
ME_MUX_2Bbyte m17 ( notA, buffA2, D0[63:56], D1[63:56], Xout[63:56] ) ;
endmodule
module ME_MUX_2B_B_13 ( A, D0, D1, Xout );
input A ;
input [12:0] D0, D1 ;
output [12:0] Xout ;
ME_BUFF g10 ( A, buffA ) ;
ME_INV_B g12 ( A, notA ) ;
ME_MUX_2B_Bbyte m10 ( notA, buffA, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2B_Bbit m11 ( notA, buffA, D0[8], D1[8], Xout[8] ) ;
ME_MUX_2B_Bbit m12 ( notA, buffA, D0[9], D1[9], Xout[9] ) ;
ME_MUX_2B_Bbit m13 ( notA, buffA, D0[10], D1[10], Xout[10] ) ;
ME_MUX_2B_Bbit m14 ( notA, buffA, D0[11], D1[11], Xout[11] ) ;
ME_MUX_2B_Bbit m15 ( notA, buffA, D0[12], D1[12], Xout[12] ) ;
endmodule
module ME_MUX_2B_13 ( A, D0, D1, Xout );
input A ;
input [12:0] D0, D1 ;
output [12:0] Xout ;
ME_BUFF g10 ( A, buffA ) ;
ME_INV_B g12 ( A, notA ) ;
ME_MUX_2Bbyte m10 ( notA, buffA, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2Bbit m11 ( notA, buffA, D0[8], D1[8], Xout[8] ) ;
ME_MUX_2Bbit m12 ( notA, buffA, D0[9], D1[9], Xout[9] ) ;
ME_MUX_2Bbit m13 ( notA, buffA, D0[10], D1[10], Xout[10] ) ;
ME_MUX_2Bbit m14 ( notA, buffA, D0[11], D1[11], Xout[11] ) ;
ME_MUX_2Bbit m15 ( notA, buffA, D0[12], D1[12], Xout[12] ) ;
endmodule
module ME_MUX_2B_11 ( A, D0, D1, Xout );
input A ;
input [10:0] D0, D1 ;
output [10:0] Xout ;
ME_INVA i0 ( A, notA ) ;
ME_BUFF b1 ( A, buffA ) ;
ME_BUFF b2 ( notA, buffnotA ) ;
ME_MUX_2Bbyte m10 ( buffnotA, buffA, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2Bbit m11 ( buffnotA, buffA, D0[8], D1[8], Xout[8] ) ;
ME_MUX_2Bbit m12 ( buffnotA, buffA, D0[9], D1[9], Xout[9] ) ;
ME_MUX_2Bbit m13 ( buffnotA, buffA, D0[10], D1[10], Xout[10] ) ;
endmodule
module ME_MUX_2B_8 ( A, D0, D1, Xout );
input A ;
input [7:0] D0, D1 ;
output [7:0] Xout ;
ME_INV_B g11 ( A, notA ) ;
ME_MUX_2Bbyte m10 ( notA, A, D0[7:0], D1[7:0], Xout[7:0] ) ;
endmodule
module ME_MUX_2B_9 ( A, D0, D1, Xout );
input A ;
input [8:0] D0, D1 ;
output [8:0] Xout ;
ME_BUFF g10 ( A, buffA ) ;
ME_INV_B g11 ( A, notA ) ;
ME_MUX_2Bbyte m10 ( notA, buffA, D0[7:0], D1[7:0], Xout[7:0] ) ;
ME_MUX_2Bbit m11 ( notA, buffA, D0[8], D1[8], Xout[8] ) ;
endmodule
module ME_MUX_2B_5 ( A, D0, D1, Xout );
input A ;
input [4:0] D0, D1 ;
output [4:0] Xout ;
ME_BUFF g10 ( A, buffA ) ;
ME_INV_B g11 ( A, notA ) ;
ME_MUX_2Bbit m10 ( notA, buffA, D0[0], D1[0], Xout[0] ) ;
ME_MUX_2Bbit m11 ( notA, buffA, D0[1], D1[1], Xout[1] ) ;
ME_MUX_2Bbit m12 ( notA, buffA, D0[2], D1[2], Xout[2] ) ;
ME_MUX_2Bbit m13 ( notA, buffA, D0[3], D1[3], Xout[3] ) ;
ME_MUX_2Bbit m14 ( notA, buffA, D0[4], D1[4], Xout[4] ) ;
endmodule
module ME_MUX_4Bbyte ( A, B, D0, D1, D2, D3, Xout ) ;
input A, B;
input [7:0] D0, D1, D2, D3;
output [7:0] Xout;
ME_MUX4B m0 (.a(A), .b(B), .d0(D0[0]), .d1(D1[0]), .d2(D2[0]), .d3(D3[0]), .z(Xout[0]));
ME_MUX4B m1 (.a(A), .b(B), .d0(D0[1]), .d1(D1[1]), .d2(D2[1]), .d3(D3[1]), .z(Xout[1]));
ME_MUX4B m2 (.a(A), .b(B), .d0(D0[2]), .d1(D1[2]), .d2(D2[2]), .d3(D3[2]), .z(Xout[2]));
ME_MUX4B m3 (.a(A), .b(B), .d0(D0[3]), .d1(D1[3]), .d2(D2[3]), .d3(D3[3]), .z(Xout[3]));
ME_MUX4B m4 (.a(A), .b(B), .d0(D0[4]), .d1(D1[4]), .d2(D2[4]), .d3(D3[4]), .z(Xout[4]));
ME_MUX4B m5 (.a(A), .b(B), .d0(D0[5]), .d1(D1[5]), .d2(D2[5]), .d3(D3[5]), .z(Xout[5]));
ME_MUX4B m6 (.a(A), .b(B), .d0(D0[6]), .d1(D1[6]), .d2(D2[6]), .d3(D3[6]), .z(Xout[6]));
ME_MUX4B m7 (.a(A), .b(B), .d0(D0[7]), .d1(D1[7]), .d2(D2[7]), .d3(D3[7]), .z(Xout[7]));
endmodule
module ME_MUX_4B_4 ( A, B, D0, D1, D2, D3, X );
input A, B ;
input [3:0] D0, D1, D2, D3 ;
output [3:0] X ;
ME_MUX4B m0 ( A, B, D0[0], D1[0], D2[0], D3[0], X[0] ) ;
ME_MUX4B m1 ( A, B, D0[1], D1[1], D2[1], D3[1], X[1] ) ;
ME_MUX4B m2 ( A, B, D0[2], D1[2], D2[2], D3[2], X[2] ) ;
ME_MUX4B m3 ( A, B, D0[3], D1[3], D2[3], D3[3], X[3] ) ;
endmodule
module ME_MUX_4B_10 ( A, B, D0, D1, D2, D3, X );
input A, B ;
input [9:0] D0, D1, D2, D3 ;
output [9:0] X ;
ME_BUF_C g10 ( A, buffA ) ;
ME_BUF_B g11 ( B, buffB ) ;
ME_MUX_4Bbyte m10 ( buffA, buffB, D0[7:0], D1[7:0], D2[7:0], D3[7:0], X[7:0] ) ;
ME_MUX4B m16 ( buffA, buffB, D0[8], D1[8], D2[8], D3[8], X[8] ) ;
ME_MUX4B m15 ( buffA, buffB, D0[9], D1[9], D2[9], D3[9], X[9] ) ;
endmodule
module ME_MUX_4B_13 ( A, B, D0, D1, D2, D3, X );
input A, B ;
input [12:0] D0, D1, D2, D3 ;
output [12:0] X ;
ME_BUF_C g10 ( A, buffA ) ;
ME_BUF_B g11 ( B, buffB ) ;
ME_MUX_4Bbyte m10 ( buffA, buffB, D0[7:0], D1[7:0], D2[7:0], D3[7:0], X[7:0] ) ;
ME_MUX4B m16 ( buffA, buffB, D0[8], D1[8], D2[8], D3[8], X[8] ) ;
ME_MUX4B m15 ( buffA, buffB, D0[9], D1[9], D2[9], D3[9], X[9] ) ;
ME_MUX4B m17 ( buffA, buffB, D0[10], D1[10], D2[10], D3[10], X[10] ) ;
ME_MUX4B m18 ( buffA, buffB, D0[11], D1[11], D2[11], D3[11], X[11] ) ;
ME_MUX4B m19 ( buffA, buffB, D0[12], D1[12], D2[12], D3[12], X[12] ) ;
endmodule
module ME_TIEOFF (VDD, GND);
output VDD, GND;
N1Z001 vdd(VDD);
N1Z000 gnd(GND);
endmodule
module cn1 (out, in1);
input in1 ;
output out ;
assign out = in1;
//NULL_WIRE u1 (in1, out);
endmodule
module con1 (con_in, con_out);
input con_in;
output con_out;
// buf z0 (con_out, con_in);
cn1 z0 (con_out, con_in);
endmodule
// Meiko macros
//
module ME_FD1P2 ( Q, QN, CP, D );
input [1:0] D;
input CP;
output [1:0] Q, QN ;
ME_FD1P f0(.q(Q[0]), .qn(QN[0]), .cp(CP), .d(D[0]));
ME_FD1P f1(.q(Q[1]), .qn(QN[1]), .cp(CP), .d(D[1]));
endmodule
module ME_FD1P_6 ( Q, QN, CP, D );
input CP;
input [5:0] D;
output [5:0] Q, QN ;
ME_FD1P f0(.q(Q[0]), .qn(QN[0]), .cp(CP), .d(D[0]) );
ME_FD1P f1(.q(Q[1]), .qn(QN[1]), .cp(CP), .d(D[1]) );
ME_FD1P f2(.q(Q[2]), .qn(QN[2]), .cp(CP), .d(D[2]) );
ME_FD1P f3(.q(Q[3]), .qn(QN[3]), .cp(CP), .d(D[3]) );
ME_FD1P f4(.q(Q[4]), .qn(QN[4]), .cp(CP), .d(D[4]) );
ME_FD1P f5(.q(Q[5]), .qn(QN[5]), .cp(CP), .d(D[5]) );
endmodule
module ME_FDS2LP2 ( Q, QN, CP, CR, D, LD );
input [1:0] D;
input CP, LD, CR;
output [1:0] Q, QN ;
ME_FDS2LP f0(.q(Q[0]), .qn(QN[0]), .cp(CP), .cr(CR), .d(D[0]), .ld(LD));
ME_FDS2LP f1(.q(Q[1]), .qn(QN[1]), .cp(CP), .cr(CR), .d(D[1]), .ld(LD));
endmodule
module ME_FDS2LP3 ( Q, QN, CP, CR, D, LD );
input [2:0] D;
input CP, LD, CR;
output [2:0] Q, QN;
ME_FDS2LP f0(.q(Q[0]), .qn(QN[0]), .cp(CP), .cr(CR), .d(D[0]), .ld(LD));
ME_FDS2LP f1(.q(Q[1]), .qn(QN[1]), .cp(CP), .cr(CR), .d(D[1]), .ld(LD));
ME_FDS2LP f2(.q(Q[2]), .qn(QN[2]), .cp(CP), .cr(CR), .d(D[2]), .ld(LD));
endmodule
module ME_FDS2LP4 ( Q, QN, CP, CR, D, LD );
input [3:0] D;
input CP, LD, CR;
output [3:0] Q, QN;
ME_FDS2LP f0(.q(Q[0]), .qn(QN[0]), .cp(CP), .cr(CR), .d(D[0]), .ld(LD));
ME_FDS2LP f1(.q(Q[1]), .qn(QN[1]), .cp(CP), .cr(CR), .d(D[1]), .ld(LD));
ME_FDS2LP f2(.q(Q[2]), .qn(QN[2]), .cp(CP), .cr(CR), .d(D[2]), .ld(LD));
ME_FDS2LP f3(.q(Q[3]), .qn(QN[3]), .cp(CP), .cr(CR), .d(D[3]), .ld(LD));
endmodule
module ME_FDS2LP5 ( Q, QN, CP, CR, D, LD );
input [4:0] D;
input CP, LD, CR;
output [4:0] Q, QN;
ME_FDS2LP f0(.q(Q[0]), .qn(QN[0]), .cp(CP), .cr(CR), .d(D[0]), .ld(LD));
ME_FDS2LP f1(.q(Q[1]), .qn(QN[1]), .cp(CP), .cr(CR), .d(D[1]), .ld(LD));
ME_FDS2LP f2(.q(Q[2]), .qn(QN[2]), .cp(CP), .cr(CR), .d(D[2]), .ld(LD));
ME_FDS2LP f3(.q(Q[3]), .qn(QN[3]), .cp(CP), .cr(CR), .d(D[3]), .ld(LD));
ME_FDS2LP f4(.q(Q[4]), .qn(QN[4]), .cp(CP), .cr(CR), .d(D[4]), .ld(LD));
endmodule
module ME_FDS2LP8 ( Q, QN, CP, CR, D, LD );
input [7:0] D;
input CP, LD, CR;
output [7:0] Q, QN;
ME_FDS2LP f0(.q(Q[0]), .qn(QN[0]), .cp(CP), .cr(CR), .d(D[0]), .ld(LD));
ME_FDS2LP f1(.q(Q[1]), .qn(QN[1]), .cp(CP), .cr(CR), .d(D[1]), .ld(LD));
ME_FDS2LP f2(.q(Q[2]), .qn(QN[2]), .cp(CP), .cr(CR), .d(D[2]), .ld(LD));
ME_FDS2LP f3(.q(Q[3]), .qn(QN[3]), .cp(CP), .cr(CR), .d(D[3]), .ld(LD));
ME_FDS2LP f4(.q(Q[4]), .qn(QN[4]), .cp(CP), .cr(CR), .d(D[4]), .ld(LD));
ME_FDS2LP f5(.q(Q[5]), .qn(QN[5]), .cp(CP), .cr(CR), .d(D[5]), .ld(LD));
ME_FDS2LP f6(.q(Q[6]), .qn(QN[6]), .cp(CP), .cr(CR), .d(D[6]), .ld(LD));
ME_FDS2LP f7(.q(Q[7]), .qn(QN[7]), .cp(CP), .cr(CR), .d(D[7]), .ld(LD));
endmodule
module ME_MUX2_2 (Z, A, B, S);
input [1:0] A, B;
input S;
output [1:0] Z;
AMUX2A u0 (.O(Z[0]), .A(A[0]), .B(B[0]), .S(S) );
AMUX2A u1 (.O(Z[1]), .A(A[1]), .B(B[1]), .S(S) );
endmodule
module ME_MUX2_5 (Z, A, B, S);
input [4:0] A, B;
input S;
output [4:0] Z;
AMUX2A u0 (.O(Z[0]), .A(A[0]), .B(B[0]), .S(S) );
AMUX2A u1 (.O(Z[1]), .A(A[1]), .B(B[1]), .S(S) );
AMUX2A u2 (.O(Z[2]), .A(A[2]), .B(B[2]), .S(S) );
AMUX2A u3 (.O(Z[3]), .A(A[3]), .B(B[3]), .S(S) );
AMUX2A u4 (.O(Z[4]), .A(A[4]), .B(B[4]), .S(S) );
endmodule
module ME_MUX21H23 (Z, A, B, S);
input [22:0] A, B;
input S;
output [22:0] Z;
ME_BUF_D b10 ( S, buffS ) ;
ME_INV_C b11 ( S, notS ) ;
ME_MUX_2Bbyte m10 ( notS, buffS, A[ 7: 0], B[ 7: 0], Z[ 7: 0] ) ;
ME_MUX_2Bbyte m11 ( notS, buffS, A[15: 8], B[15: 8], Z[15: 8] ) ;
ME_MUX_2Bbit m0 ( notS, buffS, A[16], B[16], Z[16] );
ME_MUX_2Bbit m1 ( notS, buffS, A[17], B[17], Z[17] );
ME_MUX_2Bbit m2 ( notS, buffS, A[18], B[18], Z[18] );
ME_MUX_2Bbit m3 ( notS, buffS, A[19], B[19], Z[19] );
ME_MUX_2Bbit m4 ( notS, buffS, A[20], B[20], Z[20] );
ME_MUX_2Bbit m5 ( notS, buffS, A[21], B[21], Z[21] );
ME_MUX_2Bbit m6 ( notS, buffS, A[22], B[22], Z[22] );
endmodule
module ME_MUX21H25 (Z, A, B, S);
input [24:0] A, B;
input S;
output [24:0] Z;
ME_BUF_D b10 ( S, buffS ) ;
ME_INV_C b11 ( S, notS ) ;
ME_MUX_2Bbyte m10 ( notS, buffS, A[ 7: 0], B[ 7: 0], Z[ 7: 0] ) ;
ME_MUX_2Bbyte m11 ( notS, buffS, A[15: 8], B[15: 8], Z[15: 8] ) ;
ME_MUX_2Bbyte m12 ( notS, buffS, A[23:16], B[23:16], Z[23:16] ) ;
ME_MUX_2Bbit m0 ( notS, buffS, A[24], B[24], Z[24] );
endmodule
module ME_MUX21H28 (Z, A, B, S, notS);
input [27:0] A, B;
input S, notS;
output [27:0] Z;
ME_INV_C b10 ( S, buffnotS_1 ) ;
ME_INV_C b11 ( notS, buffS_1 ) ;
ME_INV_C b12 ( S, buffnotS_2 ) ;
ME_INV_C b13 ( notS, buffS_2 ) ;
ME_MUX_2Bbyte m10 ( buffnotS_1, buffS_1, A[ 7: 0], B[ 7: 0], Z[ 7: 0] ) ;
ME_MUX_2Bbyte m11 ( buffnotS_1, buffS_1, A[15: 8], B[15: 8], Z[15: 8] ) ;
ME_MUX_2Bbyte m12 ( buffnotS_2, buffS_2, A[23:16], B[23:16], Z[23:16] ) ;
ME_MUX_2Bbit m0 ( buffnotS_2, buffS_2, A[24], B[24], Z[24] );
ME_MUX_2Bbit m1 ( buffnotS_2, buffS_2, A[25], B[25], Z[25] );
ME_MUX_2Bbit m2 ( buffnotS_2, buffS_2, A[26], B[26], Z[26] );
ME_MUX_2Bbit m3 ( buffnotS_2, buffS_2, A[27], B[27], Z[27] );
endmodule
module ME_MUX21H30 (Z, A, B, S);
input [29:0] A, B;
input S;
output [29:0] Z;
ME_BUF_D b10 ( S, buffS ) ;
ME_INV_C b11 ( S, notS ) ;
ME_MUX_2Bbyte m10 ( notS, buffS, A[ 7: 0], B[ 7: 0], Z[ 7: 0] ) ;
ME_MUX_2Bbyte m11 ( notS, buffS, A[15: 8], B[15: 8], Z[15: 8] ) ;
ME_MUX_2Bbyte m12 ( notS, buffS, A[23:16], B[23:16], Z[23:16] ) ;
ME_MUX_2Bbit m0 ( notS, buffS, A[24], B[24], Z[24] );
ME_MUX_2Bbit m1 ( notS, buffS, A[25], B[25], Z[25] );
ME_MUX_2Bbit m2 ( notS, buffS, A[26], B[26], Z[26] );
ME_MUX_2Bbit m3 ( notS, buffS, A[27], B[27], Z[27] );
ME_MUX_2Bbit m4 ( notS, buffS, A[28], B[28], Z[28] );
ME_MUX_2Bbit m5 ( notS, buffS, A[29], B[29], Z[29] );
endmodule
module ME_MUX21H32 (Z, A, B, S);
input [31:0] A, B;
input S;
output [31:0] Z;
ME_BUF_D b10 ( S, buffS ) ;
ME_INV_C b11 ( S, notS ) ;
ME_MUX_2Bbyte m10 ( notS, buffS, A[ 7: 0], B[ 7: 0], Z[ 7: 0] ) ;
ME_MUX_2Bbyte m11 ( notS, buffS, A[15: 8], B[15: 8], Z[15: 8] ) ;
ME_MUX_2Bbyte m12 ( notS, buffS, A[23:16], B[23:16], Z[23:16] ) ;
ME_MUX_2Bbyte m13 ( notS, buffS, A[31:24], B[31:24], Z[31:24] ) ;
endmodule
module ME_MUX21H53 (Z, A, B, S);
input [52:0] A, B;
input S;
output [52:0] Z;
ME_BUF_D b10 ( S, buffS ) ;
ME_INV_C b11 ( S, notS ) ;
ME_MUX_2Bbyte m10 ( notS, buffS, A[ 7: 0], B[ 7: 0], Z[ 7: 0] ) ;
ME_MUX_2Bbyte m11 ( notS, buffS, A[15: 8], B[15: 8], Z[15: 8] ) ;
ME_MUX_2Bbyte m12 ( notS, buffS, A[23:16], B[23:16], Z[23:16] ) ;
ME_MUX_2Bbyte m13 ( notS, buffS, A[31:24], B[31:24], Z[31:24] ) ;
ME_MUX_2Bbyte m14 ( notS, buffS, A[39:32], B[39:32], Z[39:32] ) ;
ME_MUX_2Bbyte m15 ( notS, buffS, A[47:40], B[47:40], Z[47:40] ) ;
ME_MUX_2Bbit m0 ( notS, buffS, A[48], B[48], Z[48] );
ME_MUX_2Bbit m1 ( notS, buffS, A[49], B[49], Z[49] );
ME_MUX_2Bbit m2 ( notS, buffS, A[50], B[50], Z[50] );
ME_MUX_2Bbit m3 ( notS, buffS, A[51], B[51], Z[51] );
ME_MUX_2Bbit m4 ( notS, buffS, A[52], B[52], Z[52] );
endmodule
module ME_MUX_3bit ( s0, s1, d0, d1, d2, Q ) ;
input s0, s1, d0, d1, d2;
output Q ;
// s1 s0 : Q
// 0 0 : d0
// 0 1 : d1
// 1 0 : d2
// 1 1 : d2
AMUX3A g0 (d0, d1, d2, s0, s1, Q);
endmodule
module ME_MUX_3byte ( s0, s1, d0, d1, d2, Q ) ;
input s0, s1;
input [7:0] d0, d1, d2;
output [7:0] Q ;
ME_MUX_3bit f0 ( s0, s1, d0[0], d1[0], d2[0], Q [0]) ;
ME_MUX_3bit f1 ( s0, s1, d0[1], d1[1], d2[1], Q [1]) ;
ME_MUX_3bit f2 ( s0, s1, d0[2], d1[2], d2[2], Q [2]) ;
ME_MUX_3bit f3 ( s0, s1, d0[3], d1[3], d2[3], Q [3]) ;
ME_MUX_3bit f4 ( s0, s1, d0[4], d1[4], d2[4], Q [4]) ;
ME_MUX_3bit f5 ( s0, s1, d0[5], d1[5], d2[5], Q [5]) ;
ME_MUX_3bit f6 ( s0, s1, d0[6], d1[6], d2[6], Q [6]) ;
ME_MUX_3bit f7 ( s0, s1, d0[7], d1[7], d2[7], Q [7]) ;
endmodule
/* real instances start here */
module ME_MUX3_25 ( Q, s0, s1, d0, d1, d2 ) ;
input s0, s1;
input [24:0] d0, d1, d2;
output [24:0] Q;
ME_BUF_C b0 (s0, buff1_s0);
ME_BUF_C b1 (s0, buff2_s0);
ME_BUF_C b2 (s1, buff1_s1);
ME_BUF_C b3 (s1, buff2_s1);
ME_MUX_3byte m0
(buff1_s0, buff1_s1, d0[ 7: 0], d1[ 7: 0], d2[ 7: 0], Q[ 7: 0] );
ME_MUX_3byte m1
(buff1_s0, buff1_s1, d0[15: 8], d1[15: 8], d2[15: 8], Q[15: 8] );
ME_MUX_3byte m2
(buff2_s0, buff2_s1, d0[23:16], d1[23:16], d2[23:16], Q[23:16] );
ME_MUX_3bit m3_0 (buff2_s0, buff2_s1, d0[24], d1[24], d2[24], Q[24] );
endmodule
module ME_MUX3_53 ( Q, s0, s1, d0, d1, d2 ) ;
input s0, s1;
input [52:0] d0, d1, d2;
output [52:0] Q;
ME_BUF_C b0 (s0, buff1_s0);
ME_BUF_C b1 (s0, buff2_s0);
ME_BUF_C b2 (s0, buff3_s0);
ME_BUF_C b3 (s0, buff4_s0);
ME_BUF_C b4 (s1, buff1_s1);
ME_BUF_C b5 (s1, buff2_s1);
ME_BUF_C b6 (s1, buff3_s1);
ME_BUF_C b7 (s1, buff4_s1);
ME_MUX_3byte m0
(buff1_s0, buff1_s1, d0[ 7: 0], d1[ 7: 0], d2[ 7: 0], Q[ 7: 0] );
ME_MUX_3byte m1
(buff1_s0, buff1_s1, d0[15: 8], d1[15: 8], d2[15: 8], Q[15: 8] );
ME_MUX_3byte m2
(buff2_s0, buff2_s1, d0[23:16], d1[23:16], d2[23:16], Q[23:16] );
ME_MUX_3byte m3
(buff2_s0, buff2_s1, d0[31:24], d1[31:24], d2[31:24], Q[31:24] );
ME_MUX_3byte m4
(buff3_s0, buff3_s1, d0[39:32], d1[39:32], d2[39:32], Q[39:32] );
ME_MUX_3byte m5
(buff3_s0, buff3_s1, d0[47:40], d1[47:40], d2[47:40], Q[47:40] );
ME_MUX_3bit m6_0 (buff4_s0, buff4_s1, d0[48], d1[48], d2[48], Q[48] );
ME_MUX_3bit m6_1 (buff4_s0, buff4_s1, d0[49], d1[49], d2[49], Q[49] );
ME_MUX_3bit m6_2 (buff4_s0, buff4_s1, d0[50], d1[50], d2[50], Q[50] );
ME_MUX_3bit m6_3 (buff4_s0, buff4_s1, d0[51], d1[51], d2[51], Q[51] );
ME_MUX_3bit m6_4 (buff4_s0, buff4_s1, d0[52], d1[52], d2[52], Q[52] );
endmodule
module ME_MUX41H28 ( Q, d0, d1, d2, d3, A, B ) ;
input A, B;
input [27:0] d0, d1, d2, d3;
output [27:0] Q ;
ME_BUF_C b0 ( A, buffA1 ) ;
ME_BUF_C b1 ( A, buffA2 ) ;
ME_BUF_C b2 ( B, buffB1 ) ;
ME_BUF_C b3 ( B, buffB2 ) ;
ME_MUX_4Bbyte m10 ( buffA1, buffB1,
d0[ 7: 0], d1[ 7: 0], d2[ 7: 0], d3[ 7: 0], Q[ 7: 0] ) ;
ME_MUX_4Bbyte m11 ( buffA1, buffB1,
d0[15: 8], d1[15: 8], d2[15: 8], d3[15: 8], Q[15: 8] );
ME_MUX_4Bbyte m12 ( buffA2, buffB2,
d0[23:16], d1[23:16], d2[23:16], d3[23:16], Q[23:16] ) ;
ME_MUX4B m13_0 ( buffA2, buffB2, d0[24], d1[24], d2[24], d3[24], Q[24] );
ME_MUX4B m13_1 ( buffA2, buffB2, d0[25], d1[25], d2[25], d3[25], Q[25] );
ME_MUX4B m13_2 ( buffA2, buffB2, d0[26], d1[26], d2[26], d3[26], Q[26] );
ME_MUX4B m13_3 ( buffA2, buffB2, d0[27], d1[27], d2[27], d3[27], Q[27] );
endmodule
module ME_MUX41H32 ( Q, d0, d1, d2, d3, A, B ) ;
input A, B;
input [31:0] d0, d1, d2, d3;
output [31:0] Q ;
ME_BUF_C b0 ( A, buffA1 ) ;
ME_BUF_C b1 ( A, buffA2 ) ;
ME_BUF_C b2 ( B, buffB1 ) ;
ME_BUF_C b3 ( B, buffB2 ) ;
ME_MUX_4Bbyte m10 ( buffA1, buffB1,
d0[ 7: 0], d1[ 7: 0], d2[ 7: 0], d3[ 7: 0], Q[ 7: 0] ) ;
ME_MUX_4Bbyte m11 ( buffA1, buffB1,
d0[15: 8], d1[15: 8], d2[15: 8], d3[15: 8], Q[15: 8] );
ME_MUX_4Bbyte m12 ( buffA2, buffB2,
d0[23:16], d1[23:16], d2[23:16], d3[23:16], Q[23:16] ) ;
ME_MUX_4Bbyte m13 ( buffA2, buffB2,
d0[31:24], d1[31:24], d2[31:24], d3[31:24], Q[31:24] ) ;
endmodule
module ME_MUX41H53 ( Q, d0, d1, d2, d3, sel ) ;
input [1:0] sel ;
input [52:0] d0, d1, d2, d3;
output [52:0] Q ;
ME_BUF_C b0 ( sel[0], buffA1 ) ;
ME_BUF_C b1 ( sel[0], buffA2 ) ;
ME_BUF_C b2 ( sel[0], buffA3 ) ;
ME_BUF_C b3 ( sel[0], buffA4 ) ;
ME_BUF_C b4 ( sel[1], buffB1 ) ;
ME_BUF_C b5 ( sel[1], buffB2 ) ;
ME_BUF_C b6 ( sel[1], buffB3 ) ;
ME_BUF_C b7 ( sel[1], buffB4 ) ;
ME_MUX_4Bbyte m10 ( buffA1, buffB1,
d0[7:0], d1[7:0], d2[7:0], d3[7:0], Q[7:0] ) ;
ME_MUX_4Bbyte m11 ( buffA1, buffB1,
d0[15:8], d1[15:8], d2[15:8], d3[15:8], Q[15:8] );
ME_MUX_4Bbyte m12 ( buffA2, buffB2,
d0[23:16], d1[23:16], d2[23:16], d3[23:16], Q[23:16] ) ;
ME_MUX_4Bbyte m13 ( buffA2, buffB2,
d0[31:24], d1[31:24], d2[31:24], d3[31:24], Q[31:24] ) ;
ME_MUX_4Bbyte m14 ( buffA3, buffB3,
d0[39:32], d1[39:32], d2[39:32], d3[39:32], Q[39:32] ) ;
ME_MUX_4Bbyte m15 ( buffA3, buffB3,
d0[47:40], d1[47:40], d2[47:40], d3[47:40], Q[47:40] ) ;
ME_MUX4B m16_0 ( buffA4, buffB4, d0[48], d1[48], d2[48], d3[48], Q[48] );
ME_MUX4B m16_1 ( buffA4, buffB4, d0[49], d1[49], d2[49], d3[49], Q[49] );
ME_MUX4B m16_2 ( buffA4, buffB4, d0[50], d1[50], d2[50], d3[50], Q[50] );
ME_MUX4B m16_3 ( buffA4, buffB4, d0[51], d1[51], d2[51], d3[51], Q[51] );
ME_MUX4B m16_4 ( buffA4, buffB4, d0[52], d1[52], d2[52], d3[52], Q[52] );
endmodule
// Meiko adder macros
//
module ME_ADD_13 ( sub, CarryIn, x, y, z, zbuf, Eqv ) ;
input sub, CarryIn;
input [12:0] x, y ;
output [12:0] zbuf, z ;
output Eqv ;
adder13 add ( sub, CarryIn, x, y, z, Eqv ) ;
assign zbuf = z ;
endmodule
module ME_SUB_13 ( sub, CarryIn, x, y, z );
input sub, CarryIn;
input [12:0] x, y ;
output [12:0] z ;
adder13 sub13 ( sub, CarryIn, x, y, z, ) ;
endmodule
module subtract13 ( x, y, z) ;
input [12:0] x, y ;
output [12:0] z ;
// special 1's comp. subtractor
adder13 sub13 ( 1'b1, 1'b0, x, y, z, ) ;
endmodule
module dual_adder13 ( x, y, sum_0, sum_1 ) ;
input [12:0] x, y ;
output [12:0] sum_0 ; // x+y
output [12:0] sum_1 ; // x+y+1
adder13
expadd0 (.z( sum_0[12:0] ), // x+y
.x( x[12:0] ),
.y( y[12:0]),
.sub(1'b0),
.CarryIn(1'b0)
);
adder13
expadd1 (.z( sum_1[12:0] ), // x+y+1
.x( x[12:0] ),
.y( y[12:0]),
.sub(1'b0),
.CarryIn(1'b1)
);
endmodule
module adder13 ( sub, CarryIn, x, y, z, Eqv ) ;
input sub, CarryIn;
input [12:0] x, y ;
output [12:0] z ;
output Eqv ;
wire [12:0] zbuf;
ME_INVA s1 (sub, notsub);
ME_INV_C s0 (notsub, Bsub);
acell4 bit0to3 ( x[3:0], y[3:0], Bsub, CarryIn, z[3:0], zbuf[3:0], p0, g0 ) ;
acell4 bit4to7 ( x[7:4], y[7:4], Bsub, Cin1, z[7:4], zbuf[7:4], p1, g1 ) ;
acell4 bit8to11 ( x[11:8], y[11:8], Bsub, Cin2, z[11:8], zbuf[11:8], p2, g2 ) ;
acell1 bit11 ( x[12], y[12], Bsub, Cin3, z[12], zbuf[12], p3, notp3, p3buf);
ME_NMUX2B g10 ( p1, g1, g0, notg7to0 ) ;
ME_INV_A g11 ( CarryIn, notCin ) ;
ME_INV_A g12 ( g0, notg0 ) ;
ME_NMUX2B_B g13 ( p0, notg0, notCin, Cin1 ) ;
ME_NAND2_B g14 ( p0, p1, notplo );
ME_NMUX2B_B g15 ( notplo, notCin, notg7to0, Cin2 ) ;
ME_NAND2_B g16 ( notplo, p2, notUseG7to0 );
ME_NMUX2B g17 ( p2, g2, CarryIn, notCinOrg11to8) ;
ME_NMUX2B_B g18 ( notUseG7to0, notg7to0, notCinOrg11to8, Cin3 ) ;
ME_INV_A g19 ( notplo, plo ) ;
ME_AND2 g20 ( p2, p3, phi );
ME_AND2 g21 ( phi, plo, Eqv ) ;
endmodule
module adder29 ( CarryIn, x, y, z ) ;
input CarryIn;
input [27:0] x, y ;
output [28:0] z ;
assign z = x[27:0] + y[27:0] + CarryIn ;
endmodule
module ME_ADD_58 ( notsub, CarryIn, x, y, z, zbuf, Eqv ) ;
input notsub, CarryIn ;
input [57:0] x, y ;
output [57:0] zbuf, z ;
output Eqv ;
adder58 adr ( notsub, notsub, CarryIn, x, y, z, Eqv ) ;
assign zbuf = z;
endmodule
module adder52 ( x, y, sum_0, sum_1 ) ;
input [51:0] x, y ;
output [51:0] sum_0 ; // x+y
output [51:0] sum_1 ; // x+y+1
wire [57:0] sumout_0, sumout_1 ;
adder58
add52_0 ( // only use 52 bits
.z( sumout_0[57:0] ),
.x( {6'b0, x[51:0]} ),
.y( {6'b0, y[51:0]} ),
.CarryIn(1'b0),
.notsub_0(1'b1),
.notsub_1(1'b1)
);
assign sum_0[51:0] = sumout_0[51:0] ;
adder58
add52_1 ( // only use 52 bits
.z( sumout_1[57:0] ),
.x( {6'b0, x[51:0]} ),
.y( {6'b0, y[51:0]} ),
.CarryIn(1'b1),
.notsub_0(1'b1),
.notsub_1(1'b1)
);
assign sum_1[51:0] = sumout_1[51:0] ;
endmodule
module adder58 ( notsub_0, notsub_1, CarryIn, x, y, z, Eqv ) ;
input notsub_0, notsub_1, CarryIn ;
input [57:0] x, y ;
output [57:0] z ;
output Eqv ;
wire [57:0] zbuf;
ME_INV_C s1 (notsub_0, Bsub1);
ME_INV_C s2 (notsub_1, Bsub2);
acell16 bit0to15 ( x[15:0], y[15:0], Bsub1, CarryIn, z[15:0], zbuf[15:0], p0, g0 ) ;
acell16 bit16to31 ( x[31:16], y[31:16], Bsub1, Cin1, z[31:16], zbuf[31:16], p1, g1 ) ;
acell16 bit32to47 ( x[47:32], y[47:32], Bsub2, Cin2, z[47:32], zbuf[47:32], p2, g2 ) ;
// acell10 bit47to57 ( x[57:48], y[57:48], Bnotsub2, Cin3, z[57:48], zbuf[57:48], p3, g3 ) ;
acell10 bit47to57 ( x[57:48], y[57:48], Bsub2, Cin3, z[57:48], zbuf[57:48], p3 ) ;
ME_NMUX2B_B g10 ( p1, g1, g0, notg31to0 ) ;
ME_INV_A g11 ( CarryIn, notCin ) ;
ME_INV_A g12 ( g0, notg0 ) ;
ME_NMUX2B_B g13 ( p0, notg0, notCin, Cin1 ) ;
ME_NAND2_B g14 ( p0, p1, notplo );
ME_NMUX2B_B g15 ( notplo, notCin, notg31to0, Cin2 ) ;
ME_NAND2_B g16 ( notplo, p2, notUseG31to0 );
ME_NMUX2B g17 ( p2, g2, CarryIn, notCinOrg47to32) ;
ME_NMUX2B_B g18 ( notUseG31to0, notg31to0, notCinOrg47to32, Cin3 ) ;
ME_INV_A g19 ( notplo, plo ) ;
ME_AND2 g20 ( p2, p3, phi );
ME_AND2 g21 ( phi, plo, Eqv ) ;
// ME_INV_A g22 ( notg31to0, g31to0) ; // Not intrested in CarryOut
// ME_INV_A g23 ( notCinOrg47to32, CinOrg47to32) ; // Drove nowhere
// ME_MUX2B g24 ( p3, g3, g2, g57to32 ) ; // Not intrested in CarryOut
// ME_MUX2B g25 ( phi, g57to32, g31to0, g57to0 ) ; // Not intrested in CarryOut
// ME_MUX2B g26 ( Eqv, g57to0, CarryIn, CarryOut ) ; // Not intrested in CarryOut
endmodule
module acell10 ( x, y, notsub, Cin, z, zbuf, p ) ;
input [9:0] x, y ;
input notsub, Cin ;
output [9:0] zbuf, z ;
// output p, g;
output p;
acell4a bit0 ( x[3:0], y[3:0], notsub, notCin0, z[3:0], zbuf[3:0], p0, g0) ;
acell4a bit4 ( x[7:4], y[7:4], notsub, notCin4, z[7:4], zbuf[7:4], p4, g4) ;
acell1a bit8 ( x[8], y[8], notsub, notCin8, z[8], zbuf[8], p8, notp8, pbuf8 ) ;
acell1a bit9 ( x[9], y[9], notsub, notCin9, z[9], zbuf[9], p9, notp9, pbuf9 ) ;
ME_NAND2 g10 ( p0, p4, notplo ) ;
// ME_NAND2 g11 ( p8, p9, notphi ) ;
ME_NMUX2B g12 ( p4, g4, g0, notglo ) ;
// ME_NMUX2B_B g13 ( p9, x[9], x[8], notghi ) ;
// ME_NMUX2B g14 ( notphi, notglo, notghi, g ) ;
ME_INV_B g15 ( Cin, notCin0 );
ME_NMUX2B_B g17 ( p0, g0, Cin, notCin4 ) ;
//ME_INV_A g18 ( notglo, glo );
ME_INV_A g30 ( Cin, notCin);
ME_MUX2B g19 ( notplo, notCin, notglo, notCin8 ) ;
ME_NAND3 g20 ( p0, p4, pbuf8, notp0to8 ) ;
ME_INV_A g21 ( x[8], notg8 ) ;
ME_NMUX2B g25 ( p8, notg8, notglo, gl0to8 ) ;
ME_NMUX2B g26 ( notp0to8, Cin, gl0to8, notCin9 ) ;
ME_AND4_B g27 ( p0, p4, p8, p9, p ) ;
endmodule
module acell16 ( x, y, notsub, Cin, z, zbuf, p, g ) ;
input [15:0] x, y ;
input notsub, Cin ;
output [15:0] zbuf, z ;
output p, g;
acell4a bit0 ( x[3:0], y[3:0], notsub, notCin0, z[3:0], zbuf[3:0], p0, g0) ;
acell4a bit1 ( x[7:4], y[7:4], notsub, notCin1, z[7:4], zbuf[7:4], p1, g1) ;
acell4a bit2 ( x[11:8], y[11:8], notsub, notCin2, z[11:8], zbuf[11:8], p2, g2) ;
acell4a bit3 ( x[15:12], y[15:12], notsub, notCin3, z[15:12], zbuf[15:12], p3, g3) ;
ME_NAND2 g10 ( p0, p1, notplo ) ;
ME_NAND2 g11 ( p2, p3, notphi ) ;
ME_NMUX2B g12 ( p1, g1, g0, notglo ) ;
ME_NMUX2B g13 ( p3, g3, g2, notghi ) ;
ME_NMUX2B g14 ( notphi, notglo, notghi, g ) ;
ME_INV_B g15 ( Cin, notCin0 );
ME_INV_A g16 ( g0, notg0 ) ;
ME_INV_A g17 ( notg0, g0buf ) ;
ME_NMUX2B_B g18 ( p0, g0buf, Cin, notCin1 ) ;
ME_INV_A g19 ( notglo, glo );
ME_NMUX2B_B g20 ( notplo, Cin, glo, notCin2 ) ;
ME_NAND3 g21 ( p0, p1, p2, notp0to2 ) ;
ME_INV_A g22 ( g2, notg2 ) ;
ME_INV_A g23 ( glo, notglobuf );
ME_INV_A g24 ( p2, notp2 );
ME_NMUX2B g25 ( notp2, notglobuf, notg2, gl0to2 ) ;
ME_NMUX2B_B g26 ( notp0to2, Cin, gl0to2, notCin3 ) ;
ME_AND4_B g27 ( p0, p1, p2, p3, p ) ;
endmodule
module acell4 ( x, y, notsub, Cin, z, zbuf, p, g ) ;
input [3:0] x, y ;
input notsub, Cin ;
output [3:0] z, zbuf ;
output p, g;
acell1a bit0 ( x[0], y[0], notsub, notCin0, z[0], zbuf[0], p0, notp0, pbuf0 ) ;
acell1a bit1 ( x[1], y[1], notsub, notCin1, z[1], zbuf[1], p1, notp1, pbuf1 ) ;
acell1a bit2 ( x[2], y[2], notsub, notCin2, z[2], zbuf[2], p2, notp2, pbuf2 ) ;
acell1a bit3 ( x[3], y[3], notsub, notCin3, z[3], zbuf[3], p3, notp3, pbuf3 ) ;
ME_NAND2 g10 ( pbuf0, pbuf1, notplo ) ;
ME_NAND2 g11 ( p2, p3, notphi ) ;
ME_NMUX2B_B g12 ( p1, x[1], x[0], notglo ) ;
ME_NMUX2B_B g13 ( p3, x[3], x[2], notghi ) ;
ME_NMUX2B_B g14 ( notphi, notglo, notghi, g ) ;
ME_INVA g15 ( Cin, notCin0 );
ME_INV_A g16 ( x[0], notg0 );
ME_INV_A g17 ( notg0, g0 );
ME_NMUX2B g18 ( p0, g0, Cin, notCin1 ) ;
ME_INV_A g19 ( notglo, glo );
ME_NMUX2B g20 ( notplo, Cin, glo, notCin2 ) ;
ME_NAND3 g21 ( pbuf0, pbuf1, pbuf2, notp0to2 ) ;
ME_INV_A g22 ( x[2], notg2 );
ME_INV_A g23 ( glo, notglobuf );
ME_NMUX2B g24 ( notp2, notglobuf, notg2, g0to2 ) ;
| This page: |
Created: | Thu Aug 19 12:00:59 1999 |
| From: |
../../../sparc_v8/lib/rtl/me_cells.v
|