.X (b_234)
) ;
// Dummy pad vss2_235 ()
// vss
// Bidirectional pad for b_236 (b_memdata[2]), enabled by b_mem_oen
PCI_BI b_236_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_236_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_234_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_234_po),
.PO (b_236_po
),
.SO (b_236_so
),
.IT (b_236_i),
.X (b_236)
) ;
// Bidirectional pad for b_237 (b_memdata[3]), enabled by b_mem_oen
PCI_BI b_237_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_237_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_236_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_236_po),
.PO (b_237_po
),
.SO (b_237_so
),
.IT (b_237_i),
.X (b_237)
) ;
// Bidirectional pad for b_238 (b_memdata[4]), enabled by b_mem_oen
PCI_BI b_238_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_238_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_237_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_237_po),
.PO (b_238_po
),
.SO (b_238_so
),
.IT (b_238_i),
.X (b_238)
) ;
// Bidirectional pad for b_239 (b_memdata[5]), enabled by b_mem_oen
PCI_BI b_239_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_239_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_238_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_238_po),
.PO (b_239_po
),
.SO (b_239_so
),
.IT (b_239_i),
.X (b_239)
) ;
// Dummy pad vss_240 ()
// vss
// Dummy pad vdd_241 ()
// vdd
// Bidirectional pad for b_242 (b_memdata[6]), enabled by b_mem_oen
PCI_BI b_242_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_242_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_239_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_239_po),
.PO (b_242_po
),
.SO (b_242_so
),
.IT (b_242_i),
.X (b_242)
) ;
// Bidirectional pad for b_243 (b_memdata[7]), enabled by b_mem_oen
PCI_BI b_243_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_243_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_242_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_242_po),
.PO (b_243_po
),
.SO (b_243_so
),
.IT (b_243_i),
.X (b_243)
) ;
// Bidirectional pad for b_244 (b_memdata[8]), enabled by b_mem_oen
PCI_BI b_244_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_244_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_243_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_243_po),
.PO (b_244_po
),
.SO (b_244_so
),
.IT (b_244_i),
.X (b_244)
) ;
// Dummy pad vss_245 ()
// vss
// Dummy pad vss2_246 ()
// vss
// Bidirectional pad for b_247 (b_memdata[9]), enabled by b_mem_oen
PCI_BI b_247_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_247_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_244_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_244_po),
.PO (b_247_po
),
.SO (b_247_so
),
.IT (b_247_i),
.X (b_247)
) ;
// Bidirectional pad for b_248 (b_memdata[10]), enabled by b_mem_oen
PCI_BI b_248_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_248_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_247_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_247_po),
.PO (b_248_po
),
.SO (b_248_so
),
.IT (b_248_i),
.X (b_248)
) ;
// Dummy pad vdd2_249 ()
// vdd
// Bidirectional pad for b_250 (b_memdata[11]), enabled by b_mem_oen
PCI_BI b_250_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_250_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_248_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_248_po),
.PO (b_250_po
),
.SO (b_250_so
),
.IT (b_250_i),
.X (b_250)
) ;
// Dummy pad vdd_251 ()
// vdd
// Bidirectional pad for b_252 (b_memdata[12]), enabled by b_mem_oen
PCI_BI b_252_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_252_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_250_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_250_po),
.PO (b_252_po
),
.SO (b_252_so
),
.IT (b_252_i),
.X (b_252)
) ;
// Bidirectional pad for b_253 (b_memdata[13]), enabled by b_mem_oen
PCI_BI b_253_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_253_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_252_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_252_po),
.PO (po_out),
.SO (scan_out),
.IT (b_253_i),
.X (b_253)
) ;
// Dummy pad vss_254 ()
// vss
endmodule
This page: |
Created: | Thu Aug 19 11:59:51 1999 |
| From: |
../../../sparc_v8/ssparc/iopads/rtl/rightpads.v
|