/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
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/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
// @(#)sampledwaitctl.v 1.1 4/7/92
//
module SampledWaitCtl
(
RomShiftAlign, RomShiftForInt, RomLeftnotRight,
notReset,
notAbortNulExc,
notWaitForShifter,
notNO[1:0],
notIdleLatched,
UpdateOutputs,
notSampledWait);
input RomShiftAlign
, RomShiftForInt
, RomLeftnotRight
;
input notReset
, notAbortNulExc
;
input notWaitForShifter
;
input [1:0] notNO
;
input notIdleLatched
;
output UpdateOutputs
, notSampledWait
;
// Cycle maybe nullifed ie AbortNulExc
ME_INVA swrb2 (RomLeftnotRight, RightnotLeft
);
ME_OR2_B n0 ( notNO[1], notNO[0], notWaitForNorm
) ;
ME_NMUX2B swrb3 (RomLeftnotRight, notWaitForShifter, notWaitForNorm, WaitQ
);
ME_NOR2 swmzs (RomShiftForInt, RightnotLeft, RomWaitForNorm
);
ME_OR2 swmis (RomShiftAlign, RomWaitForNorm, RomWaitForShifter
);
ME_AND3 g1_0 (notReset, notAbortNulExc, RomWaitForShifter, notPreventWait
);
// Add muxes
ME_NAND2_B sweb (WaitQ, notPreventWait, notSampledWait);
ME_AND2 wwpp2 (notSampledWait, notIdleLatched, UpdateOutputs);
endmodule
This page: |
Created: | Thu Aug 19 12:01:36 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_ctl/rtl/sampledwaitctl.v
|