) ;

    // Bidirectional pad for b_304 (b_memdata[44]), enabled by b_mem_oen
    PCI_BI b_304_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_304_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_303_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_303_po),
	.PO	(b_304_po),
	.SO	(b_304_so),
	.IT	(b_304_i),
	.X	(b_304)
    ) ;

    // Dummy pad vdd_305 ()
    // vdd

    // Dummy pad vss_306 ()
    // vss

    // Bidirectional pad for b_307 (b_memdata[45]), enabled by b_mem_oen
    PCI_BI b_307_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_307_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_304_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_304_po),
	.PO	(b_307_po),
	.SO	(b_307_so),
	.IT	(b_307_i),
	.X	(b_307)
    ) ;

    // Bidirectional pad for b_308 (b_memdata[46]), enabled by b_mem_oen
    PCI_BI b_308_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_308_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_307_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_307_po),
	.PO	(b_308_po),
	.SO	(b_308_so),
	.IT	(b_308_i),
	.X	(b_308)
    ) ;

    // Bidirectional pad for b_309 (b_memdata[47]), enabled by b_mem_oen
    PCI_BI b_309_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_309_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_308_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_308_po),
	.PO	(b_309_po),
	.SO	(b_309_so),
	.IT	(b_309_i),
	.X	(b_309)
    ) ;

    // Dummy pad vdd_310 ()
    // vdd

    // Dummy pad vss_311 ()
    // vss

    // Bidirectional pad for b_312 (b_memdata[48]), enabled by b_mem_oen
    PCI_BI b_312_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_312_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_309_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_309_po),
	.PO	(b_312_po),
	.SO	(b_312_so),
	.IT	(b_312_i),
	.X	(b_312)
    ) ;

    // Bidirectional pad for b_313 (b_memdata[49]), enabled by b_mem_oen
    PCI_BI b_313_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_313_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_312_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_312_po),
	.PO	(b_313_po),
	.SO	(b_313_so),
	.IT	(b_313_i),
	.X	(b_313)
    ) ;

    // Bidirectional pad for b_314 (b_memdata[50]), enabled by b_mem_oen
    PCI_BI b_314_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_314_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_313_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_313_po),
	.PO	(b_314_po),
	.SO	(b_314_so),
	.IT	(b_314_i),
	.X	(b_314)
    ) ;

    // Bidirectional pad for b_315 (b_memdata[51]), enabled by b_mem_oen
    PCI_BI b_315_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_315_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_314_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_314_po),
	.PO	(b_315_po),
	.SO	(b_315_so),
	.IT	(b_315_i),
	.X	(b_315)
    ) ;

    // Dummy pad vdd2_316 ()
    // vdd 

    // Dummy pad vss2_317 ()
    // vss 

    // Bidirectional pad for b_318 (b_memdata[52]), enabled by b_mem_oen
    PCI_BI b_318_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_318_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_315_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_315_po),
	.PO	(b_318_po),
	.SO	(b_318_so),
	.IT	(b_318_i),
	.X	(b_318)
    ) ;

    // Bidirectional pad for b_319 (b_memdata[53]), enabled by b_mem_oen
    PCI_BI b_319_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_319_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_318_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_318_po),
	.PO	(b_319_po),
	.SO	(b_319_so),
	.IT	(b_319_i),
	.X	(b_319)
    ) ;

    // Bidirectional pad for b_320 (b_memdata[54]), enabled by b_mem_oen
    PCI_BI b_320_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_320_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_319_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_319_po),
	.PO	(b_320_po),
	.SO	(b_320_so),
	.IT	(b_320_i),
	.X	(b_320)
    ) ;

    // Bidirectional pad for b_321 (b_memdata[55]), enabled by b_mem_oen
    PCI_BI b_321_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_321_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_320_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_320_po),
	.PO	(b_321_po),
	.SO	(b_321_so),
	.IT	(b_321_i),
	.X	(b_321)
    ) ;

    // Dummy pad vdd_322 ()
    // vdd

    // Dummy pad vss_323 ()
    // vss

    // Bidirectional pad for b_324 (b_memdata[56]), enabled by b_mem_oen
    PCI_BI b_324_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_324_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_321_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_321_po),
	.PO	(b_324_po),
	.SO	(b_324_so),
	.IT	(b_324_i),
	.X	(b_324)
    ) ;

    // Bidirectional pad for b_325 (b_memdata[57]), enabled by b_mem_oen
    PCI_BI b_325_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_325_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_324_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_324_po),
	.PO	(b_325_po),
	.SO	(b_325_so),
	.IT	(b_325_i),
	.X	(b_325)
    ) ;

    // Bidirectional pad for b_326 (b_memdata[58]), enabled by b_mem_oen
    PCI_BI b_326_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_326_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_325_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_325_po),
	.PO	(b_326_po),
	.SO	(b_326_so),
	.IT	(b_326_i),
	.X	(b_326)
    ) ;

    // Bidirectional pad for b_327 (b_memdata[59]), enabled by b_mem_oen
    PCI_BI b_327_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_327_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_326_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_326_po),
	.PO	(b_327_po),
	.SO	(b_327_so),
	.IT	(b_327_i),
	.X	(b_327)
    ) ;

    // Bidirectional pad for b_328 (b_memdata[60]), enabled by b_mem_oen
    PCI_BI b_328_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_328_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_327_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_327_po),
	.PO	(b_328_po),
	.SO	(b_328_so),
	.IT	(b_328_i),
	.X	(b_328)
    ) ;

    // Bidirectional pad for b_329 (b_memdata[61]), enabled by b_mem_oen
    PCI_BI b_329_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_329_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_328_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_328_po),
	.PO	(b_329_po),
	.SO	(b_329_so),
	.IT	(b_329_i),
	.X	(b_329)
    ) ;

    // Dummy pad vdd2_330 ()
    // vdd  

    // Dummy pad vss2_331 ()
    // vss

    // Bidirectional pad for b_332 (b_memdata[62]), enabled by b_mem_oen
    PCI_BI b_332_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_332_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_329_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_329_po),
	.PO	(b_332_po),
	.SO	(b_332_so),
	.IT	(b_332_i),
	.X	(b_332)
    ) ;

    // Bidirectional pad for b_333 (b_memdata[63]), enabled by b_mem_oen
    PCI_BI b_333_pad(
	.ENC_	(b_mem_oen_enc_l),
	.OT	(b_333_o),
	.TN	(w_input_tn),
	.SHIFT	(bscan_shift),
	.SI	(b_332_so),
	.CK	(bscan_clk_cap),
	.UP	(bscan_clk_upd),
	.MD1	(bscan_sel_ff_out),
	.MD2	(bscan_sel_ff_in),
	.PI	(b_332_po),
	.PO	(po_out),
	.SO	(scan_out),
	.IT	(b_333_i),
	.X	(b_333)
    ) ;

    // Dummy pad vss_334 ()
    // vss


endmodule