/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
/* are trademarks or registered trademarks of SPARC International, Inc. in */
/* the United States and other countries. Products bearing SPARC trademarks */
/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
/***************************************************************************
****************************************************************************
***
*** Program File: @(#)toppads.v
***
****************************************************************************
****************************************************************************/
// @(#)toppads.v 1.16 10/31/96
// Automatically generated from iopad_order rev 1.9 by mkiopads, rev 1.9
![[Up: iopads toppads]](v2html-up.gif)
module toppads
( // Pads listed in right-to-left order:
// vss_255, // vss
// vss_256, // vss
b_mem_oen, // b_mem_oen
b_257, // b_memdata[14]
b_257_o,
b_257_i,
b_258, // b_memdata[15]
b_258_o,
b_258_i,
// vdd_259, // vdd
// vss_260, // vss
// vdd_261, // vdd
b_262, // b_memdata[16]
b_262_o,
b_262_i,
b_263, // b_memdata[17]
b_263_o,
b_263_i,
b_264, // b_memdata[18]
b_264_o,
b_264_i,
b_265, // b_memdata[19]
b_265_o,
b_265_i,
// vss_266, // vss
b_267, // b_memdata[20]
b_267_o,
b_267_i,
b_268, // b_memdata[21]
b_268_o,
b_268_i,
b_269, // b_memdata[22]
b_269_o,
b_269_i,
// vdd_270, // vdd
b_271, // b_memdata[23]
b_271_o,
b_271_i,
// vss2_272, // vss
// vdd2_273, // vdd
b_274, // b_memdata[24]
b_274_o,
b_274_i,
b_275, // b_memdata[25]
b_275_o,
b_275_i,
b_276, // b_memdata[26]
b_276_o,
b_276_i,
// vss_277, // vss
// vdd_278, // vdd
b_279, // b_memdata[27]
b_279_o,
b_279_i,
b_280, // b_memdata[28]
b_280_o,
b_280_i,
b_281, // b_memdata[29]
b_281_o,
b_281_i,
b_282, // b_memdata[30]
b_282_o,
b_282_i,
// vss_283, // vss
// vdd_284, // vdd
b_285, // b_memdata[31]
b_285_o,
b_285_i,
b_286, // b_memdata[32]
b_286_o,
b_286_i,
b_287, // b_memdata[33]
b_287_o,
b_287_i,
// vss_288, // vss
// vss2_289, // vss
b_290, // b_memdata[34]
b_290_o,
b_290_i,
b_291, // b_memdata[35]
b_291_o,
b_291_i,
// vdd_292, // vdd
b_293, // b_memdata[36]
b_293_o,
b_293_i,
b_294, // b_memdata[37]
b_294_o,
b_294_i,
b_295, // b_memdata[38]
b_295_o,
b_295_i,
b_296, // b_memdata[39]
b_296_o,
b_296_i,
b_297, // b_memdata[40]
b_297_o,
b_297_i,
b_298, // b_memdata[41]
b_298_o,
b_298_i,
// vss_299, // vss
// vdd_300, // vdd
b_301, // b_memdata[42]
b_301_o,
b_301_i,
// vdd2_302, // vdd
b_303, // b_memdata[43]
b_303_o,
b_303_i,
b_304, // b_memdata[44]
b_304_o,
b_304_i,
// vdd_305, // vdd
// vss_306, // vss
b_307, // b_memdata[45]
b_307_o,
b_307_i,
b_308, // b_memdata[46]
b_308_o,
b_308_i,
b_309, // b_memdata[47]
b_309_o,
b_309_i,
// vdd_310, // vdd
// vss_311, // vss
b_312, // b_memdata[48]
b_312_o,
b_312_i,
b_313, // b_memdata[49]
b_313_o,
b_313_i,
b_314, // b_memdata[50]
b_314_o,
b_314_i,
b_315, // b_memdata[51]
b_315_o,
b_315_i,
// vdd2_316, // vdd
// vss2_317, // vss
b_318, // b_memdata[52]
b_318_o,
b_318_i,
b_319, // b_memdata[53]
b_319_o,
b_319_i,
b_320, // b_memdata[54]
b_320_o,
b_320_i,
b_321, // b_memdata[55]
b_321_o,
b_321_i,
// vdd_322, // vdd
// vss_323, // vss
b_324, // b_memdata[56]
b_324_o,
b_324_i,
b_325, // b_memdata[57]
b_325_o,
b_325_i,
b_326, // b_memdata[58]
b_326_o,
b_326_i,
b_327, // b_memdata[59]
b_327_o,
b_327_i,
b_328, // b_memdata[60]
b_328_o,
b_328_i,
b_329, // b_memdata[61]
b_329_o,
b_329_i,
// vdd2_330, // vdd
// vss2_331, // vss
b_332, // b_memdata[62]
b_332_o,
b_332_i,
b_333, // b_memdata[63]
b_333_o,
b_333_i,
// vss_334, // vss
bscan_clk_cap,
bscan_clk_upd,
w_input_tn,
bscan_shift,
bscan_sel_ff_out,
bscan_sel_ff_in,
pi_in,
scan_in,
po_out,
scan_out
) ;
input b_mem_oen ; // b_mem_oen
inout b_257 ; // b_memdata[14]
input b_257_o ;
output b_257_i ;
inout b_258 ; // b_memdata[15]
input b_258_o ;
output b_258_i ;
inout b_262 ; // b_memdata[16]
input b_262_o ;
output b_262_i ;
inout b_263 ; // b_memdata[17]
input b_263_o ;
output b_263_i ;
inout b_264 ; // b_memdata[18]
input b_264_o ;
output b_264_i ;
inout b_265 ; // b_memdata[19]
input b_265_o ;
output b_265_i ;
inout b_267 ; // b_memdata[20]
input b_267_o ;
output b_267_i ;
inout b_268 ; // b_memdata[21]
input b_268_o ;
output b_268_i ;
inout b_269 ; // b_memdata[22]
input b_269_o ;
output b_269_i ;
inout b_271 ; // b_memdata[23]
input b_271_o ;
output b_271_i ;
inout b_274 ; // b_memdata[24]
input b_274_o ;
output b_274_i ;
inout b_275 ; // b_memdata[25]
input b_275_o ;
output b_275_i ;
inout b_276 ; // b_memdata[26]
input b_276_o ;
output b_276_i ;
inout b_279 ; // b_memdata[27]
input b_279_o ;
output b_279_i ;
inout b_280 ; // b_memdata[28]
input b_280_o ;
output b_280_i ;
inout b_281 ; // b_memdata[29]
input b_281_o ;
output b_281_i ;
inout b_282 ; // b_memdata[30]
input b_282_o ;
output b_282_i ;
inout b_285 ; // b_memdata[31]
input b_285_o ;
output b_285_i ;
inout b_286 ; // b_memdata[32]
input b_286_o ;
output b_286_i ;
inout b_287 ; // b_memdata[33]
input b_287_o ;
output b_287_i ;
inout b_290 ; // b_memdata[34]
input b_290_o ;
output b_290_i ;
inout b_291 ; // b_memdata[35]
input b_291_o ;
output b_291_i ;
inout b_293 ; // b_memdata[36]
input b_293_o ;
output b_293_i ;
inout b_294 ; // b_memdata[37]
input b_294_o ;
output b_294_i ;
inout b_295 ; // b_memdata[38]
input b_295_o ;
output b_295_i ;
inout b_296 ; // b_memdata[39]
input b_296_o ;
output b_296_i ;
inout b_297 ; // b_memdata[40]
input b_297_o ;
output b_297_i ;
inout b_298 ; // b_memdata[41]
input b_298_o ;
output b_298_i ;
inout b_301 ; // b_memdata[42]
input b_301_o ;
output b_301_i ;
inout b_303 ; // b_memdata[43]
input b_303_o ;
output b_303_i ;
inout b_304 ; // b_memdata[44]
input b_304_o ;
output b_304_i ;
inout b_307 ; // b_memdata[45]
input b_307_o ;
output b_307_i ;
inout b_308 ; // b_memdata[46]
input b_308_o ;
output b_308_i ;
inout b_309 ; // b_memdata[47]
input b_309_o ;
output b_309_i ;
inout b_312 ; // b_memdata[48]
input b_312_o ;
output b_312_i ;
inout b_313 ; // b_memdata[49]
input b_313_o ;
output b_313_i ;
inout b_314 ; // b_memdata[50]
input b_314_o ;
output b_314_i ;
inout b_315 ; // b_memdata[51]
input b_315_o ;
output b_315_i ;
inout b_318 ; // b_memdata[52]
input b_318_o ;
output b_318_i ;
inout b_319 ; // b_memdata[53]
input b_319_o ;
output b_319_i ;
inout b_320 ; // b_memdata[54]
input b_320_o ;
output b_320_i ;
inout b_321 ; // b_memdata[55]
input b_321_o ;
output b_321_i ;
inout b_324 ; // b_memdata[56]
input b_324_o ;
output b_324_i ;
inout b_325 ; // b_memdata[57]
input b_325_o ;
output b_325_i ;
inout b_326 ; // b_memdata[58]
input b_326_o ;
output b_326_i ;
inout b_327 ; // b_memdata[59]
input b_327_o ;
output b_327_i ;
inout b_328 ; // b_memdata[60]
input b_328_o ;
output b_328_i ;
inout b_329 ; // b_memdata[61]
input b_329_o ;
output b_329_i ;
inout b_332 ; // b_memdata[62]
input b_332_o ;
output b_332_i ;
inout b_333 ; // b_memdata[63]
input b_333_o ;
output b_333_i ;
input bscan_clk_cap ;
input bscan_clk_upd ;
input w_input_tn ;
input bscan_shift ;
input bscan_sel_ff_out ;
input bscan_sel_ff_in ;
input pi_in ;
input scan_in ;
output po_out ;
output scan_out ;
// Dummy pad vss_255 ()
// vss
// Dummy pad vss_256 ()
// vss
// Tristate enable cell for b_mem_oen
ENABLE b_mem_oen_cell(
.EN (b_mem_oen),
.SHIFT (bscan_shift),
.SI (scan_in),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD (bscan_sel_ff_out),
.ENC_ (b_mem_oen_enc_l),
.SO (b_mem_oen_so)
) ;
// Bidirectional pad for b_257 (b_memdata[14]), enabled by b_mem_oen
PCI_BI b_257_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_257_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_mem_oen_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (pi_in),
.PO (b_257_po),
.SO (b_257_so),
.IT (b_257_i),
.X (b_257)
) ;
// Bidirectional pad for b_258 (b_memdata[15]), enabled by b_mem_oen
PCI_BI b_258_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_258_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_257_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_257_po),
.PO (b_258_po),
.SO (b_258_so),
.IT (b_258_i),
.X (b_258)
) ;
// Dummy pad vdd_259 ()
// vdd
// Dummy pad vss_260 ()
// vss
// Dummy pad vdd_261 ()
// vdd
// Bidirectional pad for b_262 (b_memdata[16]), enabled by b_mem_oen
PCI_BI b_262_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_262_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_258_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_258_po),
.PO (b_262_po),
.SO (b_262_so),
.IT (b_262_i),
.X (b_262)
) ;
// Bidirectional pad for b_263 (b_memdata[17]), enabled by b_mem_oen
PCI_BI b_263_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_263_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_262_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_262_po),
.PO (b_263_po),
.SO (b_263_so),
.IT (b_263_i),
.X (b_263)
) ;
// Bidirectional pad for b_264 (b_memdata[18]), enabled by b_mem_oen
PCI_BI b_264_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_264_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_263_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_263_po),
.PO (b_264_po),
.SO (b_264_so),
.IT (b_264_i),
.X (b_264)
) ;
// Bidirectional pad for b_265 (b_memdata[19]), enabled by b_mem_oen
PCI_BI b_265_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_265_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_264_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_264_po),
.PO (b_265_po),
.SO (b_265_so),
.IT (b_265_i),
.X (b_265)
) ;
// Dummy pad vss_266 ()
// vss
// Bidirectional pad for b_267 (b_memdata[20]), enabled by b_mem_oen
PCI_BI b_267_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_267_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_265_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_265_po),
.PO (b_267_po),
.SO (b_267_so),
.IT (b_267_i),
.X (b_267)
) ;
// Bidirectional pad for b_268 (b_memdata[21]), enabled by b_mem_oen
PCI_BI b_268_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_268_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_267_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_267_po),
.PO (b_268_po),
.SO (b_268_so),
.IT (b_268_i),
.X (b_268)
) ;
// Bidirectional pad for b_269 (b_memdata[22]), enabled by b_mem_oen
PCI_BI b_269_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_269_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_268_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_268_po),
.PO (b_269_po),
.SO (b_269_so),
.IT (b_269_i),
.X (b_269)
) ;
// Dummy pad vdd_270 ()
// vdd
// Bidirectional pad for b_271 (b_memdata[23]), enabled by b_mem_oen
PCI_BI b_271_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_271_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_269_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_269_po),
.PO (b_271_po),
.SO (b_271_so),
.IT (b_271_i),
.X (b_271)
) ;
// Dummy pad vss2_272 ()
// vss
// Dummy pad vdd2_273 ()
// vdd
// Bidirectional pad for b_274 (b_memdata[24]), enabled by b_mem_oen
PCI_BI b_274_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_274_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_271_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_271_po),
.PO (b_274_po),
.SO (b_274_so),
.IT (b_274_i),
.X (b_274)
) ;
// Bidirectional pad for b_275 (b_memdata[25]), enabled by b_mem_oen
PCI_BI b_275_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_275_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_274_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_274_po),
.PO (b_275_po),
.SO (b_275_so),
.IT (b_275_i),
.X (b_275)
) ;
// Bidirectional pad for b_276 (b_memdata[26]), enabled by b_mem_oen
PCI_BI b_276_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_276_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_275_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_275_po),
.PO (b_276_po),
.SO (b_276_so),
.IT (b_276_i),
.X (b_276)
) ;
// Dummy pad vss_277 ()
// vss
// Dummy pad vdd_278 ()
// vdd
// Bidirectional pad for b_279 (b_memdata[27]), enabled by b_mem_oen
PCI_BI b_279_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_279_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_276_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_276_po),
.PO (b_279_po),
.SO (b_279_so),
.IT (b_279_i),
.X (b_279)
) ;
// Bidirectional pad for b_280 (b_memdata[28]), enabled by b_mem_oen
PCI_BI b_280_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_280_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_279_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_279_po),
.PO (b_280_po),
.SO (b_280_so),
.IT (b_280_i),
.X (b_280)
) ;
// Bidirectional pad for b_281 (b_memdata[29]), enabled by b_mem_oen
PCI_BI b_281_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_281_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_280_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_280_po),
.PO (b_281_po),
.SO (b_281_so),
.IT (b_281_i),
.X (b_281)
) ;
// Bidirectional pad for b_282 (b_memdata[30]), enabled by b_mem_oen
PCI_BI b_282_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_282_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_281_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_281_po),
.PO (b_282_po),
.SO (b_282_so),
.IT (b_282_i),
.X (b_282)
) ;
// Dummy pad vss_283 ()
// vss
// Dummy pad vdd_284 ()
// vdd
// Bidirectional pad for b_285 (b_memdata[31]), enabled by b_mem_oen
PCI_BI b_285_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_285_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_282_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_282_po),
.PO (b_285_po),
.SO (b_285_so),
.IT (b_285_i),
.X (b_285)
) ;
// Bidirectional pad for b_286 (b_memdata[32]), enabled by b_mem_oen
PCI_BI b_286_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_286_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_285_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_285_po),
.PO (b_286_po),
.SO (b_286_so),
.IT (b_286_i),
.X (b_286)
) ;
// Bidirectional pad for b_287 (b_memdata[33]), enabled by b_mem_oen
PCI_BI b_287_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_287_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_286_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_286_po),
.PO (b_287_po),
.SO (b_287_so),
.IT (b_287_i),
.X (b_287)
) ;
// Dummy pad vss_288 ()
// vss
// Dummy pad vss2_289 ()
// vss
// Bidirectional pad for b_290 (b_memdata[34]), enabled by b_mem_oen
PCI_BI b_290_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_290_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_287_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_287_po),
.PO (b_290_po),
.SO (b_290_so),
.IT (b_290_i),
.X (b_290)
) ;
// Bidirectional pad for b_291 (b_memdata[35]), enabled by b_mem_oen
PCI_BI b_291_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_291_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_290_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_290_po),
.PO (b_291_po),
.SO (b_291_so),
.IT (b_291_i),
.X (b_291)
) ;
// Dummy pad vdd_292 ()
// vdd
// Bidirectional pad for b_293 (b_memdata[36]), enabled by b_mem_oen
PCI_BI b_293_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_293_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_291_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_291_po),
.PO (b_293_po),
.SO (b_293_so),
.IT (b_293_i),
.X (b_293)
) ;
// Bidirectional pad for b_294 (b_memdata[37]), enabled by b_mem_oen
PCI_BI b_294_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_294_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_293_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_293_po),
.PO (b_294_po),
.SO (b_294_so),
.IT (b_294_i),
.X (b_294)
) ;
// Bidirectional pad for b_295 (b_memdata[38]), enabled by b_mem_oen
PCI_BI b_295_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_295_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_294_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_294_po),
.PO (b_295_po),
.SO (b_295_so),
.IT (b_295_i),
.X (b_295)
) ;
// Bidirectional pad for b_296 (b_memdata[39]), enabled by b_mem_oen
PCI_BI b_296_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_296_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_295_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_295_po),
.PO (b_296_po),
.SO (b_296_so),
.IT (b_296_i),
.X (b_296)
) ;
// Bidirectional pad for b_297 (b_memdata[40]), enabled by b_mem_oen
PCI_BI b_297_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_297_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_296_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_296_po),
.PO (b_297_po),
.SO (b_297_so),
.IT (b_297_i),
.X (b_297)
) ;
// Bidirectional pad for b_298 (b_memdata[41]), enabled by b_mem_oen
PCI_BI b_298_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_298_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_297_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_297_po),
.PO (b_298_po),
.SO (b_298_so),
.IT (b_298_i),
.X (b_298)
) ;
// Dummy pad vss_299 ()
// vss
// Dummy pad vdd_300 ()
// vdd
// Bidirectional pad for b_301 (b_memdata[42]), enabled by b_mem_oen
PCI_BI b_301_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_301_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_298_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_298_po),
.PO (b_301_po),
.SO (b_301_so),
.IT (b_301_i),
.X (b_301)
) ;
// Dummy pad vdd2_302 ()
// vdd
// Bidirectional pad for b_303 (b_memdata[43]), enabled by b_mem_oen
PCI_BI b_303_pad(
.ENC_ (b_mem_oen_enc_l),
.OT (b_303_o),
.TN (w_input_tn),
.SHIFT (bscan_shift),
.SI (b_301_so),
.CK (bscan_clk_cap),
.UP (bscan_clk_upd),
.MD1 (bscan_sel_ff_out),
.MD2 (bscan_sel_ff_in),
.PI (b_301_po),
.PO (b_303_po),
.SO (b_303_so),
.IT (b_303_i),
.X (b_303)
| This page: |
Created: | Thu Aug 19 12:02:17 1999 |
| From: |
../../../sparc_v8/ssparc/iopads/rtl/toppads.v
|