Xilinx Answer #6326 : UNISIMS: GSR/GTS behavior does not simulate with RAMB4* Verilog models.

Answers Database

UNISIMS: GSR/GTS behavior does not simulate with RAMB4* Verilog models.

Record #6326
Product Family: Software

Product Line: FPGA Implementation

Product Part: Unisim

Product Version: n/a

Problem Title:

UNISIMS: GSR/GTS behavior does not simulate with RAMB4* Verilog models.

Problem Description:
Urgency: Standard

General Description:
GSR/GTS behavior does not simulate with the RAMB4* UNISIM
Verilog models.

Solution 1:

The UNISIM Verilog models for RAMB4* does not assign glbl.GSR and
glbl.GTS to GSR and GTS, respectively. The behavioral models are
using the GSR_SIGNAL methodology.

To resolve this issue, the user can apply both methodologies for
initializing GSR/GTS.

Please see (Xilinx Solution 6537) regarding the usage of the glbl module
in the Xilinx Alliance 2.1 (or greater) software.

Please see (Xilinx Solution 3914) on the usage of the GSR_SIGNAL
text macro.

Please see (Xilinx Solution 5009) on how to drive the GSR pin.

End of Record #6326 - Last Modified: 10/22/99 14:33

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