CORE Solutions - DSP Functions Products

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On This Page Filters Transforms Modulations Video and Image Processing DSP Building Blocks DSP Core Development Tools

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CORE Solutions Feb 1998 Data Book available for download in Acrobat 3.0 (4 MB). New and updated data sheets appear below.

Filters

Function	CORE Solution	Source	Date
Distributed Arithmetic FIR Filter	LogiCORE	Xilinx	12/17/99
Comb Filter	LogiCORE	Xilinx	7/17/98
Serial Distributed Arithmetic FIR Filter	LogiCORE	Xilinx	7/17/98
Parallel Distributed Arithmetic FIR Filter	LogiCORE	Xilinx	7/17/98

Transforms

Function	CORE Solution	Source	Date
High-Performance 16-point Complex FFT	LogiCORE	Xilinx	12/17/99
High-Performance 64-point Complex FFT	LogiCORE	Xilinx	12/17/99
High-Performance 256-point Complex FFT	LogiCORE	Xilinx	12/17/99
High-Performance 1024-point Complex FFT	LogiCORE	Xilinx	12/17/99
High Performance 16-point Complex FFT (for 4K Device Family)	Reference Design	Xilinx	7/17/98
High Performance 1024-Point Complex FFT (for 4K Device Family)	Reference Design	Xilinx	7/17/98

Modulations

Function	CORE Solution	Source	Date
Numerically Controlled Oscillator	LogiCORE	Xilinx	12/17/99
Dual Channel Numerically Controlled Oscillator	LogiCORE	Xilinx	12/17/99

Video and Image Processing

Function	CORE Solution	Source	Date
YCrCb2RGB Color Space Converter	AllianceCORE	Perigee, LLC	11/1/99
RGB2YCrCb Color Space Converter	AllianceCORE	Perigee, LLC	11/1/99

DSP Building Blocks

Function	CORE Solution	Source	Date
Non-Symmetric 16-Deep Time Skew Buffer	LogiCORE	Xilinx	7/17/98
Non-Symmetric 32-Deep Time Skew Buffer	LogiCORE	Xilinx	7/17/98
Symmetric 16-Deep Time Skew Buffer	LogiCORE	Xilinx	7/17/98

DSP Core Development Tools

Function	CORE Solution	Source	Date
GVA-270 Virtex-E DSP Hardware Accelerator	AllianceCORE	GV & Associates	11/1/99
GVA-220 DSP Hardware Accelerator	AllianceCORE	GV & Associates	4/19/99
GVA-250 Virtex DSP Hardware Accelerator	AllianceCORE	GV & Associates	4/19/99
GVA-200 DSP Hardware Accelerator Board	AllianceCORE	GV & Associates	10/5/98
GVA-100 DSP Prototyping Platform	AllianceCORE	GV & Associates	2/8/98
170 MHz FIFOs Using the Virtex Block SelectRAM+	Reference Design	Xilinx	4/5/99
Parameterizable Distributed RAM for Virtex(VHDL)	Reference Design	Xilinx	4/5/99