The Configuration Problem Solver

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Has either LDC gone high or HDC gone low?

Yes, either the LDC has gone high, or the HDC has gone low, or both. No, the LDC is low and the HDC is high.

The D/P pin is released as part of the Startup Sequence. The Startup Sequence has a programmable order controlled by software options during bitstream generation. By default the D/P is released first in the Startup Sequence; however, your implementation may have specified to release the D/P last. If this is the case and the I/Os have been released, noted by LDC or HDC, then the FPGA has entered the Startup Sequence.