The Configuration Problem Solver

---

CONCLUSION

The D/P pin is being held low externally.

The D/P pin is possibly being held low externally, or is not being pulled up. The D/P pin is an Open-Drain driver that must be pulled up to achieve a logic high. While the FPGA does have a programmable internal pullup resistor to the DONE pad, we recommend using an external 4.7Kohm resistor. If necessary, seperate the DONE pin from the board to verify if an external source is holding it low.