The Configuration Problem Solver
Related Solution Records
The STARTUP sequence has not completed.
Solution 4773: "FPGA Configuration: SyncToDone must apply to all devices in Daisy-Chain."
Solution 4681: "BitGen M1.5: Startup Clock can be specified by options or read from design."
Solution 3631: "FPGA Configuration: Unconnected MODE pins may cause FPGAs to not reconfigure."
Solution 176: "FPGA Configuration: Can CCLK run before data is sent?"
Solution 158: "FPGA Configuration: DONE goes High but Output never become Active."
HISTORY
Family:
XC4000
Mode:
Master Parallel
DONE:
HIGH
LDC:
LOW
CCLK:
RUNNING
