Subject: Coverage semantics
From: Joao.Geada@synopsys.com
Date: Thu Oct 17 2002 - 15:37:27 PDT
To address Michael's and Bassam's points on the specific details of coverage
semantics, I describe below specific proposed meanings to the limit & coverage
numbers for line, toggle and assertion coverages.
Line coverage:
limit: total number of statements in the appropriate portion of the design.
Statements in automatic tasks & dynamic processes are counted only once,
regardless of how many concurrent invocations may exist at any one time.
coverage: how many of the statements have been executed at least once
Note that the granularity of this number is by block (set of statements that
will execute in sequence with no change in control and without suspending for an event)
Toggle coverage:
limit: total number of bits in register & wire signals in the appropriate part of the design
(excluding arrays, but including vectors)
coverage: how many of the bits have completely toggled (had both 0->1 transitions *and* 1->0 transitions)
Granularity is 1 (1 additional bit completely toggled)
Assertion coverage:
limit: total number of assertions in the appropriate part of the design
coverage: how many of those assertions have had at least once success
Granularity is 1 (1 additional assertion had a first success)
In addition, Synopsys would be willing to add to our donation the FSM description
pragmas and FSM description config file, which would enable any user, regardless of
tool vendor to access coverage for those FSMs through the coverage API.
Joao
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Joao Geada, PhD Principal Engineer Verif Tech Group
Synopsys, Inc TEL: (508) 263-8083
154 Crane Meadow Road, Suite 300, FAX: (508) 263-8069
Marlboro, MA 01752, USA
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