Subject: [sv-cc] Another directC C mapping question
From: Francoise Martinolle (fm@cadence.com)
Date: Thu Jan 30 2003 - 15:11:57 PST
Andrzej,
another few questions...
1 st question:
If we consider a 4 bits register:
reg [4:1] r;
to pass to a directC function, given what is proposed
it would be represented in C as a unsigned int where only the first 4 bits
would be
significant. I am assuming that the remaining bits would have to be filled
with 0s.
MSB is bit 4 and LSB is bit1. In verilog 2001 LRM, MSB if left bound of the
range and
LSB is right bound of the range.
Let say that the value of r is: b'0110
The C code would retrieve the value as an unsigned int, the value would be 6.
What about if we have a signed register:
signed reg [4:1] r;
How would the C code knows that the value is signed? In case the verilog
value is negative,
the C value must be seen as negative.
Thanks
Francoise
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