RE: [sv-cc] More trivial items

I agree.  All these look fine.

Regards,
Jim Vellenga

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James H. Vellenga                            978-262-6381 
Engineering Director                   (FAX) 978-262-6636 
Cadence Design Systems, Inc.         vellenga@cadence.com 
270 Billerica Rd 
Chelmsford, MA 01824-4179 
"We all work with partial information." 
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] -----Original Message-----
] From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On 
] Behalf Of Warmke, Doug
] Sent: Friday, April 08, 2005 2:32 AM
] To: Charlie Dawson; SV-CC
] Subject: RE: [sv-cc] More trivial items
] 
] I've reviewed all these trivial items.
] They seem fine to me.  Approved!
] 
] Regards,
] Doug 
] 
] > -----Original Message-----
] > From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On 
] > Behalf Of Charles Dawson
] > Sent: Thursday, April 07, 2005 3:25 PM
] > To: SV-CC
] > Subject: [sv-cc] More trivial items
] > 
] > Hi All,
] > 
] > The following items:
] >    - Item 542 26.2.4 inconsistency
] >    - Item 540 26.1 inconsistency
] >    - Item 415 26.6.3 improperly drawn diagram - regression
] >    - Item 414 26.6.42 'taskfunc' should be 'task func'
] >    - Item 413 Need parens at end of routine call properties
] > 
] > Also fit under the trivial and obvious criteria.  These are
] > V-PTF items which is why I missed them in the first pass.
] > 
] > As we did with the other similar items, if no one objects
] > we will pass them as a block.  I'll hold off on them until
] > our Monday meeting so you will have some time to take a
] > look at them.
] > 
] >    -Chas
] > 
] > 
] > -- 
] > Charles Dawson
] > Senior Engineering Manager
] > NC-Verilog Team
] > Cadence Design Systems, Inc.
] > 270 Billerica Road
] > Chelmsford, MA  01824
] > (978) 262 - 6273
] > chas@cadence.com
] > 
] > 
] > 
] 
] 
]