[Fwd: RE: [sv-cc] 29 - uses the term "attempt"]

Hi SV-AC,

Are these terms defined?  If not, can we get them defined?  Once
defined, I need to know where so the SV-CC can add xrefs.

Thanks,

   -Chas


-------- Original Message --------
Subject: RE: [sv-cc] 29 - uses the term "attempt"
Date: Thu, 21 Apr 2005 10:49:29 -0700
From: "Bassam Tabbara" <Bassam@novas.com>
To: <chas>, "SV-CC" <sv-cc@eda.org>

Hi Charles, Chapter 18 (Assertions) uses it ... Attempt refers to an
evaluation attempt which can have threads (different evaluation paths
...) within. Since it is not really defined, I would say both "attempt"
and "thread" are worthy terms for the glossary (for SV-AC), right now
only "assertion" is there ...

Thx.
-Bassam.

--
Dr. Bassam Tabbara
Architect, R&D
Novas Software Inc.
(408) 467-7893

-----Original Message-----
From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On Behalf Of
Charles Dawson
Sent: Thursday, April 21, 2005 10:11 AM
To: SV-CC
Subject: [sv-cc] 29 - uses the term "attempt"

Hi All,

Section 29 uses the term "attempt" but does not define it.  Is this
defined elsewhere?  If so, anyone know where that would be?

    -Chas

--
Charles Dawson
Senior Engineering Manager
NC-Verilog Team
Cadence Design Systems, Inc.
270 Billerica Road
Chelmsford, MA  01824
(978) 262 - 6273
chas@cadence.com





-- 
Charles Dawson
Senior Engineering Manager
NC-Verilog Team
Cadence Design Systems, Inc.
270 Billerica Road
Chelmsford, MA  01824
(978) 262 - 6273
chas@cadence.com