[sv-cc] SV-CC Meeting minutes for 01/17/2007

Minutes of 01/17/2007 SV-CC Meeting.

ATTENDEES
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xxxxxxxxxxx Charles Dawson
xxxx-x-xxxx Ralph Duncan
xxxxxxxxxxx Jim Vellenga
x-xxx-x-xxx Andrzej Litwiniuk
xxx-xxxxxxx Abigail Moorhouse
x--xxxxxx-x Michael Rohleder
xxxxxxxxxxx Chuck Berking
xxxxx-xxxxx Bassam Tabbara
x-x-xxxxxxx Francoise Martinolle
xx----xx-xx Amit Kohli
xxxxxxxxxx- Ghassan Khoory


1.  Reviewed Patent information.

   - Chas reviewed the patent information.


2.  Reviewed minutes of the 01/03/2007 Meeting.
     Andrzej was not at the last meeting (fixed in these minutes).
     Add "motion to adjourn" (suggestion by JimV).
   - Chuck/Ralph.  ACCEPTED (unanimous)


3.  Liaisons

   - No other meetings to report.


4.  New business

   - Next face to face meeting.
     Abi is going on sabbatical in June.
     DesignCon - March 20th in Santa Clara.  Chas to find exact dates.
     Try finalize next meeting.

   - Program block semantics (Francoise)
     We need to review the proposal that the EC committee is proposing.
     They have added new regions, including PLI regions.  Michael thinks
     we need to add the appropriate callbacks.  Francoise thinks we already have
     callbacks that could be used.  Michael prefers new ones.  What happens
     for put values with a delay of zero?  Michael wants callbacks for each
     region.  JimV thinks there should be a straightforward way of matching
     callbacks to the scheduling semantics.  It looks like there are regions
     where only PLI events would happen.  JimV: If every HDL region has a before and
     after slot where we could have a callback, then if we defined a callback
     for those slots we would be all set.  Their proposal is getting pretty far
     along.  Francoise sent the proposal for Item 0890.  Michael thinks we should
     review it before they approve it.  SV-EC could use the opinion of the SV-CC.
     Michael gave some suggested applications.  Francoise thinks that there are
     some backwards compatibility issues with the current proposal.  Michael thinks
     this is exactly why we need the new proposal.
     Abi asked for an example. Michael talked about an interface between
     SystemC high level models and standard SV application. The TB objects
     like generic memory model included or instantiated will need to be
     accessed from TB or design. Other register blocks might get accessed
     through back-door. This definition of PLI regions will ensure precise
     timing for user between models, TB and design.
     Michael is having internal discussion with in Freescale on what is the
     best approach for Freescale.
     SV-CC members to continue review of mantis proposal on this item and
     think about impact to new regions and needed callbacks.
     Francoise suggested allocating specific time for SV-CC to discuss this
     item outside of the regular biweekly call.

   - SystemVerilog class deconstructors (Stu)

     Currently, there is no deconstructors in SystemVerilog.  Earlier emails
     from Doug suggested adding a finalizer command to the language as a
     motivation to clean C++ data structures. Andrzej commented that this
     might not take care of all data types that need clean up.  There were
     three ideas discussed to address the original request:

     Ralph: [user coding practice] Recommends following desirable programming
     practice where the user can achieve the required clean up through an
     appropriate import call.
     JimV: [VPI layer callback registration] User can enable a callback
     provided to detect specific dynamic objects and can act on it.  This
     requires adding those callbacks into LRM.
     Chuck/Bassam [extensible finalizer method in language/environment]: User
     can add own method based on language or environment used freeing up the
     structures

     Michael prefers having all three options, giving a chance to users to
     put their own deallocation at the right time.
     Bassam suggested taking the example in the original user email and
     running through all three ideas to find out any impact or side effect.

Motion by JimV/Chuck to adjourn. Meeting ended at 1:01 EDT.


5.  Reviewed items with proposals.

6.  Reviewed SV-CC items with proposals (Straw poll only).

7.  Old Business

8.  Action items

   - Ongoing review of Michael and Abi's compatibility proposal.
   - Francoise and Bassam to continue work on assignment patterns.
   - Francoise to champion adding support for typed parameters to the
     typespec diagrams.
   - Abi to champion adding support for parameterized classes.
   - Abi/JimV to champion improving the ability to compare objects.
   - Steve Dovich to determine best way to deal with issues between versions
     of the IEEE specs.
   - SV-CC to review proposal for Item 0890.


9.  Items for consideration at the next meeting (they already have proposals):

   - Item 1684 vpiParent clarification needed for complex var/net objects

10. Next meeting
   The next SV-CC meeting will be on 01/31/2007.
   The next P1800 meeting will be on 02/20/2007.

--
Charles Dawson
Senior Engineering Manager
NC-Verilog Team
Cadence Design Systems, Inc.
270 Billerica Road
Chelmsford, MA  01824
(978) 262 - 6273
chas@cadence.com



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