I vote yes on: 2398, I vote yes on 2414. I vote yes on 2434 I vote yes on closing 2110 and 2411 I abstain on 2396 @(edge) because I think the current descriptions of edge conditions only have one edge for synthesis reasons. I don't have enough expertise in this area to evaluate whether this will break other things. Lisa ________________________________ From: owner-sv-sc@eda.org [mailto:owner-sv-sc@eda.org] On Behalf Of Seligman, Erik Sent: Wednesday, July 16, 2008 5:18 PM To: sv-sc@eda.org Subject: [sv-sc] Call for email votes on several proposals; ballots due Mon 7/21/08, 7am. Importance: High This is a call for votes on the following: - 2398: Concurrent asserts in procedural code. REVOTE after editorial issues IDed last week were fixed. See http://www.verilog.org/mantis/view.php?id=2398 <http://www.verilog.org/mantis/view.php?id=2398> , doc concurrent_procedural_es080715b.pdf <http://www.verilog.org/mantis/file_download.php?file_id=3773&type=bug> . - 1900 : Checkers, full proposal. See http://www.verilog.org/mantis/view.php?id=1900 <http://www.verilog.org/mantis/view.php?id=1900> , docs checkers_part1_0715_tt.pdf <http://www.verilog.org/mantis/file_download.php?file_id=3770&type=bug> and checkers_part2_080716es.pdf <http://www.verilog.org/mantis/file_download.php?file_id=3778&type=bug> . - 2088: Covergroups in checkers. See http://www.verilog.org/mantis/view.php?id=2088 <http://www.verilog.org/mantis/view.php?id=2088> , doc 2088_covergroups_c_20080715.pdf <http://www.verilog.org/mantis/file_download.php?file_id=3772&type=bug> . - 2089: Final in checkers-- vote to CLOSE since now covered in 1900. See http://www.verilog.org/mantis/view.php?id=2089 <http://www.verilog.org/mantis/view.php?id=2089> . - 2414: Let VPI. See http://www.verilog.org/mantis/view.php?id=2414 <http://www.verilog.org/mantis/view.php?id=2414> , doc 2414.pdf <http://www.verilog.org/mantis/file_download.php?file_id=3741&type=bug> . - 2434: Typing changes. See http://www.verilog.org/mantis/view.php?id=2434 <http://www.verilog.org/mantis/view.php?id=2434> , doc 2434_seqprop_args_0715.pdf <http://www.verilog.org/mantis/file_download.php?file_id=3768&type=bug> . - 2396: New @edge clk. See http://www.verilog.org/mantis/view.php?id=2396 <http://www.verilog.org/mantis/view.php?id=2396> , doc edge_new_prop_jy.doc <http://www.verilog.org/mantis/file_download.php?file_id=3722&type=bug> . (Jin-- pls post the PDF too.) - 2411: Triggered in sequences-- vote to CLOSE as duplicate of 2415. See http://www.verilog.org/mantis/view.php?id=2411 <http://www.verilog.org/mantis/view.php?id=2411> . - 2110: Checkers in loops-- vote to CLOSE since now covered in 1900. See http://www.verilog.org/mantis/view.php?id=2110 <http://www.verilog.org/mantis/view.php?id=2110> . As we discussed, this is a shortened vote, closing 7am Monday morning, so we have time to implement needed amendments and revote at our Tuesday meeting. Please vote on each proposal if you are eligible. Proposal owners, be sure to watch the emails & implement friendly amendments ASAP, to increase our chances of closing on as many as possible by the next meeting. Thanks everyone! Voting eligibility: --[----------a] Arturo Salz - Synopsys vv[aa-aaaa-aa-] Abigail Morehouse - Mentor --[----------a] Bassam Tabbara - Synopsys --[----------a] Brad Pierce - Synopsys --[------a-aaa] Cliff Cummings - Sunburst Design --[a--a--aaaaa] Dave Rich - Mentor Graphics vv[aaaaaaaa-aa] Dmitry Korchemny - Intel --[------a-aa-] Don Mills - --[------aaaaa] Eduard Cerny - Synopsys tt[aaaaaaaaaaa] Erik Seligman - Intel (chair) vv[-a-aaaaaaaa] Francoise Martinolle - Cadence vv[aaaaaaaaaaa] Gordon Vreugdenhil - Mentor Graphics vv[aaaa-aaaaa-] Jin Yang - Intel --[-----aaaaaa] John Havlicek - Freescale --[----------a] Jonathan Bromley - Doulas --[-----a--a-a] Karen Pieper - Accellera vv[a-aaaaaaaaa] Lisa Piper - Cadence vv[aaa-aaaaaaa] Manisha Kulshrestha - Mentor Graphics vv[aaaaaaaaaaa] Mark Hartoog - Synopsys --[-----aaaaaa] Mehdi Mohtashemi - Synopsys vv[aaaaaaaa...] Michael Burns - Freescale v-[aa---aaaaaa] Mirek Forczek - Aldec vv[aaa--aaaaaa] Neil Korpusik - Sun Microsystems --[---------a-] Ray Ryan - Mentor --[---------aa] Shalom Bresticker - Intel vv[aa-aaaaaaaa] Steven Sharp - Cadence --[--------aaa] Stu Sutherland - Sutherland HDL --[---------aa] Surrendra Dudani - Synopsys vv[aaaaaaaaaaa] Tom Thatcher - Sun Microsystems (co-chair) Erik Seligman Formal Verification Architect Corporate Design Solutions Design Technology and Solutions Intel Corporation M.S. JF4-402 2111 NE 25th Ave Hillsboro, OR 97124 Phone: (503) 712-3134 -- This message has been scanned for viruses and dangerous content by MailScanner <http://www.mailscanner.info/> , and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Jul 18 12:43:19 2008
This archive was generated by hypermail 2.1.8 : Fri Jul 18 2008 - 12:43:40 PDT