Re: [sv-cc] Draft 8 sv_vpi_user.h issues

Hi All,

Since the include file is really important to get right, I think it is
time we have another SV-CC meeting.  I will schedule one for our regularly
scheduled time next Wednesday 1/14.

   -Chas


Chuck Berking wrote:
> Hi Abi (Happy New Year)-
> I have finally gotten around to reviewing this (a year later ;-), and I
> agree with both of your finds.  I.e.:
> 
> 1) vpiAllocScheme should be 656, not 4
> 
>   -and-
> 
> 2) cbEndOfObject should be 608, not 607 ... but only IFF there is NO
> problem with standard reason types overlapping with other (assertion) CB
> types (all- please verify!), i.e.
>    #define cbCreateObj 606
>    #define cbReclaimObj 607
>    #define cbEndOfObject 608
>             -- vs --
>    /* assertion callback types */
>    #define cbAssertionStart 606
>    #define cbAssertionSuccess 607
>    #define cbAssertionFailure 608
> 
> Also, in comparing differences I came across the following with no
> Mantis item reference (correction appears in D7):
> 
> < #define vpiTriggeredOp 74 /* the .triggered sequence operation */
> ---
> 
>>#define vpiEndedOp             74 /* the .ended sequence operation */
> 
> 
> Anyone know what Mantis item this relates to ?
> -CB
> 
> -----Original Message-----
> From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On Behalf Of
> Moorhouse, Abigail
> Sent: Friday, December 05, 2008 5:05 PM
> To: SV-CC
> Subject: [sv-cc] Another Draft 8 typo
> 
> (My last one spammed rather further than I meant to).
> 
> This one is SV-CC only
> 
> In Draft 8 sv_vpi_user.h page 1202/1235 cbReclaimObj and cbEndOfObject
> have both been defined to the same number - 607. I don't believe that
> this represents the original intention.
> 
> Again, I'd appreciate a double-check from someone before Mantising it.
> 
> Abi
> 
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> 
> 


-- 
Charles Dawson
Senior Engineering Manager
NC-Verilog Team
Cadence Design Systems, Inc.
270 Billerica Road
Chelmsford, MA  01824
(978) 262 - 6273
chas@cadence.com


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