Answers Database

Synopsys: Where can I get a list of all components I am able to instantiate? How can I get a listing of all library cell names in a XSI Library?


Record #1458

Product Family:  Software

Product Line:  Synopsys

Problem Title:
Synopsys: Where can I get a list of all components I am able to
instantiate?  How can I get a listing of all library cell names in a XSI Library?



Problem Description:
Key Words: instantiate, library, XSI, primitives

Urgency: Standard

instantiated into a VHDL or Verilog design if the component
name and the associated pin names are known.  This solution describes
where this information is documented for M1 and XACT 5.2.1.  This
solution record also states the procedure for listing the library
cell names of a Xilinx Synopsys Interface (XSI) library (.db file).

If you need further assistance with how to instantiate these
primitives, please refer to the documentation listed below.


Solution 1:


M1 documentation
================

FPGAs:

A complete list of all primitives which may be instantied for
FPGAs is located in the Dynatext on-line documentation in the
M1 manual "Synopsys (XSI) Interface/Tutorial Guide", Appendix A.

A quick reference of commonly instantiated components is located
in Appendix G of the "M1.3 Alliance Series Quick Start Guide."


CPLDs:

A list of components which may be instantiated and/or inferred
for the CPLD families (XC7000 and XC9500) may be found in
Appendix A of the "CPLD Synthesis Design Guide" also located
in the Dynatext on-line documentation.


All Devices:

For information on the function of each of these primities,
please refer to the M1 manual entitled "Libraries Guide" in
the Dynatext on-line documentation.



Solution 2:


XACT 5.2.1 Documentation
========================

XC3000 Devices:

A complete list of components which may be instantiated into an
XC3000 design is located in Appendix A of the XACT manual
"Synopsys (XSI) for FPGAs Interface/Tutorial Guide."  If you do
not have a copy of this documentation it may be downloaded from
our ftp site at:

ftp://ftp.xilinx.com/pub/documentation/interfaces/xsi_fpga.pdf


XC4000 Devices:
A complete list of components which may be instantiated into
an XC4000 design is located in Appendix B of the XACT manual
"Synopsys (XSI) for FPGAs Interface/Tutorial Guide."  If you
do not have a copy of this documentation it may be downloaded
from our ftp site at:

ftp://ftp.xilinx.com/pub/documentation/interfaces/xsi_fpga.pdf


XC5200 Devices:

A complete list of components which may be instantiated into
an XC5200 design is located on pages 7-15 of the Release Document
"Xilinx Synopsys Interface Version 3.3 Software, Interface, and
Libraries June 1995"  If you do not have a copy of this documentation
it may be downloaded from our ftp site at:

ftp://ftp.xilinx.com/pub/documentation/interfaces/xsi_note.pdf


XC7000 Devices:

A complete list of components which may be instantiated or
inferred into an XC7000 design is located in Appendix B of
the XACT manual "Synopsys (XSI) for EPLDs Interface/Tutorial
Guide."  If you do not have a copy of this documentation it
may be downloaded from our ftp site at:

ftp://ftp.xilinx.com/pub/documentation/cpld/xsi_epld.pdf


XC9500 Devices:

A complete list of components which may be instantiated or
inferred into an XC9500 design is located in Appendix A of
the XACT manual "CPLD XSI Design Guide."  If you do not have
a copy of this documentation it may be downloaded from our
ftp site at:

ftp://ftp.xilinx.com/pub/documentation/cpld/xsi.pdf


All Devices:

For information on the functionality of these primitives,
please refer to the XACT manual, "Libraries Guide."  If you
do not have a copy of this documentation it may be downloaded
from our ftp site at:

ftp://ftp.xilinx.com/pub/documentation/xactstep6/library.pdf

There is also an addendum for XC5200 and XC4000E users called
"Libraries Supplement Guide" which contains components not
included in the "Libraries Guide."  If you do not have a copy
of this documentation it may be downloaded from our ftp site at:

ftp://ftp.xilinx.com/pub/documentation/xactstep6/libsupl.pdf


For more information on instantiation of components as well
as other useful information, please see the XACT manual
"HDL Synthesis for FPGAs."  If you do not have a copy of this
documentation it may be downloaded from our ftp site at:

ftp://ftp.xilinx.com/pub/documentation/xactstep6/hdlsynth.pdf



Solution 3:


Using Synopsys to find out library cells
========================================

If you do not have access to the fore mentioned manuals,
you can obtain a listing of the library cells by using
Synopsys commands.


(1)
Start dc_shell or the design_analyzer in a directory
which contains your .synopsys_dc.setup file. The
.synopsys_dc.setup file should already be pointing to
the libraries you need for synthesizing a design
in the XSI flow.


(2)
In the command window of design_analyzer, or in
dc_shell, type the following and the hit the enter key:

read -f db link_library


(3)
Next, type in the command window of design_analyzer, or
in dc_shell, type the following and hit the enter key:

list -files

This will list all the library files in memory.


(4)
For each item on the list, type the following in the
command window, or dc_shell:

find cell filename/*

where filename is the string in front of the .db extentions.

For example, lets say that list -files gave you the following:

design_analyzer> list -files
	File			Path
	----			----
	xfpga_4000e-3.db	/synopsys/libraries/syn
	xgen_4000e.db		/synopsys/libraries/syn
	xio_4000e-3.db		/synopsys/libraries/syn
	xprim_4000e-3.db	/synopsys/libraries/syn
	xprim_4025e-3.db	/synopsys/libraries/syn

Starting at the top of this list, type the following command:

find cell xfpga_4000e-3/*

which would list:

{"xfpga_4000e-3/clb_4000", "xfpga_4000e-3/iob_4000"}

Synopsys always list cell names with the name of the .db file
which contains the cell.  The actual cell name is the
name after the '/'.


(5)
Note, some cells, even though you can get a listing on them,
should never be instantiated by the user, like the clb_4000
or iob_4000 cells, which are FPGA Compiler primitives used
by the synthesizer only.



End of Record #1458