Create clock

• Families supported

• Purpose

• Tools / How to enter

Families Supported

The following table shows which families support this constraint and which file formats and tools you can use to enter or modify it:

(*) Supported for analysis only.

(**) Supported for layout only.

Purpose

Use this constraint to create a clock constraint at a specific source and define its waveform. The static timing analysis tool uses this information to propagate the waveform across the clock network to the clock pins of all sequential elements driven by the defined clock source. The clock information is also used to compute the slacks in the specified clock domain, display setup and hold violations, and drive optimization tools such as place-and-route.

Tools /How to Enter

You can use one or more of the following methods to enter clock constraints:

• SDC - create_clock

• GCF - create_clock

• DCF - global_clocks

• Timer - Clocks tab

• SmartTime - Specifying clock constraint

See Also

Constraint entry

create_clock (SDC)

create_clock (GCF)

Clock definition

Clocks tab (Timer)

Specifying clock constraint