/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
/* are trademarks or registered trademarks of SPARC International, Inc. in */
/* the United States and other countries. Products bearing SPARC trademarks */
/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
// @(#)csregslice.v 1.1 4/7/92
//
module CSRegSlice
(Phi,
InitialMulStep,
/* notInitialSumZero, */
InitialCarryBit,
SumCarryLoadEn,
SumOut, CarryOut,
BregIn,
SumIn, CarryIn);
input Phi
;
input InitialMulStep
,
/* notInitialSumZero, */
InitialCarryBit
,
SumCarryLoadEn
;
input [`FracMSB:0] SumOut
, CarryOut
;
input [`FracMSB:1] BregIn
;
output [`FracMSB:0] SumIn
, CarryIn
;
wire [`FracMSB:0] SumReg
, CarryReg
, InitialSum
;
ME_TIEOFF toff (vdd
, gnd
);
ME_FREGA_1_58 sr (Phi, SumCarryLoadEn, SumOut, SumReg);
ME_FREGA_1_58 cr (Phi, SumCarryLoadEn, CarryOut, CarryReg);
/* ME_NMUX_2B_58 iz (notInitialSumZero, */
ME_NMUX_2B_58 iz (InitialCarryBit,
{vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd,
vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd,
vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd,
vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd, vdd,
vdd, vdd}, // 58'h3FF_FFFF_FFFF_FFFF
{BregIn, vdd},
InitialSum);
ME_MUX_2B_58 si (InitialMulStep, SumReg, InitialSum, SumIn);
ME_MUX_2B_58 ci (InitialMulStep,
CarryReg,
{gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd,
gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd,
gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd,
gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, // 56'h0
InitialCarryBit, gnd},
CarryIn);
endmodule
This page: |
Created: | Thu Aug 19 11:59:34 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_frac/rtl/csregslice.v
|