/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
/* are trademarks or registered trademarks of SPARC International, Inc. in */
/* the United States and other countries. Products bearing SPARC trademarks */
/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
/***************************************************************************
****************************************************************************
***
*** Program File: @(#)fp_rw.v
***
****************************************************************************
****************************************************************************/
// @(#)fp_rw.v 1.4 4/9/92
//
// **************************************************************
// High-level verilog model of the FPU register file read/write datapath
//
// **************************************************************
module fp_rw
(ld_fpu_w, FracResult, ExpResult, SignResult,
fpm_frac, fpm_exp, fpm_sign, res_select, rfin_select,
fprf_din );
input [63:0] ld_fpu_w
; // data bus in from the D-cache
input [54:3] FracResult
; // Fraction result from Meiko FPP
input [10:0] ExpResult
; // Exponent result from Meiko FPP
input SignResult
; // Sign result from Meiko FPP
input [51:0] fpm_frac
; // Fraction result from multiplier
input [10:0] fpm_exp
; // Exponent result from multiplier
input fpm_sign
; // Sign result from multiplier
input [1:0] res_select
; // control for result select mux
input rfin_select
; // selects result or d-cache bus
output [63:0] fprf_din
; // input to the register file
wire [63:0] result
;
ME_MUX41H32 resmux1 (result[63:32],
{fpm_sign, fpm_exp[10:0], fpm_frac[51:32]}, // fmul dbl
{fpm_sign, fpm_exp[ 7:0], fpm_frac[22: 0]}, // fmul sgl
{SignResult, ExpResult[10:0], FracResult[54:35]}, // dbl
{SignResult, ExpResult[7:0], FracResult[54:32]}, // sgl
res_select[0], res_select[1] );
ME_MUX41H32 resmux0 (result[31:0],
fpm_frac[31:0], // fmul dbl
{fpm_sign, fpm_exp[ 7:0], fpm_frac[22: 0]}, // fmul sgl
FracResult[34:3], // dbl
{SignResult, ExpResult[7:0], FracResult[54:32]}, // sgl
res_select[0], res_select[1] );
ME_MUX21H32 rfinmux1 (fprf_din[63:32], result[63:32], ld_fpu_w[63:32],
rfin_select);
ME_MUX21H32 rfinmux0 (fprf_din[31:0], result[31:0], ld_fpu_w[31:0],
rfin_select);
endmodule
This page: |
Created: | Thu Aug 19 12:00:52 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_fpm/rtl/fp_rw.v
|