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/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
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/***************************************************************************
****************************************************************************
***
***  Program File:  @(#)fpm_round.v
***
****************************************************************************
****************************************************************************/

//  @(#)fpm_round.v	1.1  4/9/92
//
// **************************************************************
//  fpm_round -- generates correct round value for overflow or
//		 non-overflow case.
// **************************************************************

[Up: final_adder round]
module fpm_round (
	      rnd_n,
	      rnd_v,
	      lsb,
	      g,
	      r,
	      s,
	      sign,
	      mode
	      );

    output rnd_n, rnd_v;

    input lsb, g, r, s, sign;
    input [1:0] mode;

    reg rnd_n, rnd_v;


    ME_TIEOFF t1 (, LOW) ;

    always @(lsb or g or r or s or sign or mode)
    case (mode)			// synopsys parallel_case full_case
	
	2'b00:			// nearest
	    begin
		rnd_n = (r & ~s & g) | (r & s) ;
		rnd_v = (g & ~(r|s) & lsb) | (g & (r|s)) ;
	    end

	2'b01:			// zero
	    begin
		rnd_n = LOW;
		rnd_v = LOW;
	    end

	2'b10:			// +infinity
	    begin
		rnd_n = (r | s) & ~sign ;
		rnd_v = (g | r | s) & ~sign ;
	    end

	2'b11:			// -infinity
	    begin
		rnd_n = (r | s) & sign ;
		rnd_v = (g | r | s) & sign ;
	    end

	// synopsys translate_off
	default:
	    begin
		rnd_n = 'bx;
		rnd_v = 'bx;
	    end
	// synopsys translate_on

    endcase

endmodule
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This page: Created:Thu Aug 19 12:02:36 1999
From: ../../../sparc_v8/ssparc/fpu/fp_fpm/rtl/fpm_round.v

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