/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
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/*                                                                            */ 
/******************************************************************************/ 
//  @(#)miptrmultiplexor.v	1.1  4/7/92
//

module MIptrMultiplexor
     (Phi,
      DyadicExc,
      notInstAndNoExc,
      notBranchTakenMIS,
      notResetOrUnimp,
      MIptrLoadEnable,
      RomEntry,
      NextMIptr,
      ExMIptr,
      Feedback,
      SelectedMIptr,	// unregistered version of RomMIptr
      RomMIptr,
      notRomMIptr);
input Phi;
input  DyadicExc,
       notInstAndNoExc,
       notBranchTakenMIS,
       notResetOrUnimp,
       MIptrLoadEnable;
input [7:0] RomEntry, NextMIptr,
            ExMIptr, Feedback;
output [7:0] SelectedMIptr, RomMIptr, notRomMIptr;

wire [7:0] Z1, Z2, Z5, Z3, notFeedbackW;

ME_INV_C ble (MIptrLoadEnable, _MIptrLoadEnable);

ME_NMUX_2B_8 g2 (DyadicExc, NextMIptr, ExMIptr, Z1);
ME_MUX_2B_8 g3 (notInstAndNoExc, RomEntry, Z5,          Z2);

ME_NMUX_2B_8 g4 (_MIptrLoadEnable, Z2, RomMIptr,       Z3);

ME_NAND2 g6_0 (notResetOrUnimp, Z1[0], Z5[0]);
ME_NAND2 g6_1 (notResetOrUnimp, Z1[1], Z5[1]);
ME_NAND2 g6_2 (notResetOrUnimp, Z1[2], Z5[2]);
ME_NAND2 g6_3 (notResetOrUnimp, Z1[3], Z5[3]);
ME_NAND2 g6_4 (notResetOrUnimp, Z1[4], Z5[4]);
ME_NAND2 g6_5 (notResetOrUnimp, Z1[5], Z5[5]);
ME_NAND2 g6_6 (notResetOrUnimp, Z1[6], Z5[6]);
ME_NAND2 g6_7 (notResetOrUnimp, Z1[7], Z5[7]);

ME_NMUX_2B_8 g5 (_MIptrLoadEnable, Feedback, RomMIptr,          notFeedbackW);

/* ********************************************************* */

// This bit should be converted into MUX and LATCH

/* ********************************************************* */

ME_NMUX2B g10 (notBranchTakenMIS, notFeedbackW[0], Z3[0], SelectedMIptr[0] );
ME_NMUX2B g11 (notBranchTakenMIS, notFeedbackW[1], Z3[1], SelectedMIptr[1] );
ME_NMUX2B g12 (notBranchTakenMIS, notFeedbackW[2], Z3[2], SelectedMIptr[2] );
ME_NMUX2B g13 (notBranchTakenMIS, notFeedbackW[3], Z3[3], SelectedMIptr[3] );
ME_NMUX2B g14 (notBranchTakenMIS, notFeedbackW[4], Z3[4], SelectedMIptr[4] );
ME_NMUX2B g15 (notBranchTakenMIS, notFeedbackW[5], Z3[5], SelectedMIptr[5] );
ME_NMUX2B g16 (notBranchTakenMIS, notFeedbackW[6], Z3[6], SelectedMIptr[6] );
ME_NMUX2B g17 (notBranchTakenMIS, notFeedbackW[7], Z3[7], SelectedMIptr[7] );

ME_FD1 mib0 (Phi, SelectedMIptr[0], RomMIptr[0], notRomMIptr[0]) ;
ME_FD1 mib1 (Phi, SelectedMIptr[1], RomMIptr[1], notRomMIptr[1]) ;
ME_FD1 mib2 (Phi, SelectedMIptr[2], RomMIptr[2], notRomMIptr[2]) ;
ME_FD1 mib3 (Phi, SelectedMIptr[3], RomMIptr[3], notRomMIptr[3]) ;
ME_FD1 mib4 (Phi, SelectedMIptr[4], RomMIptr[4], notRomMIptr[4]) ;
ME_FD1 mib5 (Phi, SelectedMIptr[5], RomMIptr[5], notRomMIptr[5]) ;
ME_FD1 mib6 (Phi, SelectedMIptr[6], RomMIptr[6], notRomMIptr[6]) ;
ME_FD1 mib7 (Phi, SelectedMIptr[7], RomMIptr[7], notRomMIptr[7]) ;

/*ME_FD2_B mib0 (Phi, notBranchTakenMIS, notFeedbackW[0], Z3[0], notRomMIptr[0], RomMIptr[0]) ;
ME_FD2_B mib1 (Phi, notBranchTakenMIS, notFeedbackW[1], Z3[1], notRomMIptr[1], RomMIptr[1]) ;
ME_FD2_B mib2 (Phi, notBranchTakenMIS, notFeedbackW[2], Z3[2], notRomMIptr[2], RomMIptr[2]) ;
ME_FD2_B mib3 (Phi, notBranchTakenMIS, notFeedbackW[3], Z3[3], notRomMIptr[3], RomMIptr[3]) ;
ME_FD2_B mib4 (Phi, notBranchTakenMIS, notFeedbackW[4], Z3[4], notRomMIptr[4], RomMIptr[4]) ;
ME_FD2_B mib5 (Phi, notBranchTakenMIS, notFeedbackW[5], Z3[5], notRomMIptr[5], RomMIptr[5]) ;
ME_FD2_B mib6 (Phi, notBranchTakenMIS, notFeedbackW[6], Z3[6], notRomMIptr[6], RomMIptr[6]) ;
ME_FD2_B mib7 (Phi, notBranchTakenMIS, notFeedbackW[7], Z3[7], notRomMIptr[7], RomMIptr[7]) ; */

/*CSL_FD1SP mib0 (notFeedbackW[0], Phi, Z3[0], notBranchTakenMIS, notRomMIptr[0], RomMIptr[0]);
CSL_FD1SP mib1 (notFeedbackW[1], Phi, Z3[1], notBranchTakenMIS, notRomMIptr[1], RomMIptr[1]);
CSL_FD1SP mib2 (notFeedbackW[2], Phi, Z3[2], notBranchTakenMIS, notRomMIptr[2], RomMIptr[2]);
CSL_FD1SP mib3 (notFeedbackW[3], Phi, Z3[3], notBranchTakenMIS, notRomMIptr[3], RomMIptr[3]);
CSL_FD1SP mib4 (notFeedbackW[4], Phi, Z3[4], notBranchTakenMIS, notRomMIptr[4], RomMIptr[4]);
CSL_FD1SP mib5 (notFeedbackW[5], Phi, Z3[5], notBranchTakenMIS, notRomMIptr[5], RomMIptr[5]);
CSL_FD1SP mib6 (notFeedbackW[6], Phi, Z3[6], notBranchTakenMIS, notRomMIptr[6], RomMIptr[6]);
CSL_FD1SP mib7 (notFeedbackW[7], Phi, Z3[7], notBranchTakenMIS, notRomMIptr[7], RomMIptr[7]);*/
endmodule