/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
/*                                                                            */ 
/* The contents of this file are subject to the current version of the Sun    */ 
/* Community Source License, microSPARCII ("the License"). You may not use    */ 
/* this file except in compliance with the License.  You may obtain a copy    */ 
/* of the License by searching for "Sun Community Source License" on the      */ 
/* World Wide Web at http://www.sun.com. See the License for the rights,      */ 
/* obligations, and limitations governing use of the contents of this file.   */ 
/*                                                                            */ 
/* Sun Microsystems, Inc. has intellectual property rights relating to the    */ 
/* technology embodied in these files. In particular, and without limitation, */ 
/* these intellectual property rights may include one or more U.S. patents,   */ 
/* foreign patents, or pending applications.                                  */ 
/*                                                                            */ 
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos,   */ 
/* Solaris, Java and all Java-based trademarks and logos are trademarks or    */ 
/* registered trademarks of Sun Microsystems, Inc. in the United States and   */ 
/* other countries. microSPARC is a trademark or registered trademark of      */ 
/* SPARC International, Inc. All SPARC trademarks are used under license and  */ 
/* are trademarks or registered trademarks of SPARC International, Inc. in    */ 
/* the United States and other countries. Products bearing SPARC trademarks   */ 
/* are based upon an architecture developed by Sun Microsystems, Inc.         */ 
/*                                                                            */ 
/******************************************************************************/ 
//  @(#)miptr.v	1.1  4/7/92
//
![[Up: Control mip]](v2html-up.gif) module MIptr
module MIptr (Phi,
              ExMIptrLSBs,
              DyadicExc,
              notInstAndNoExc,
              notBranchTakenMIS,
              notResetOrUnimp,
              MIptrLoadEnable,
              Feedback, FpInst,
	      SelectedMIptr,
              RomMIptr, notRomMIptr);
input [2:0] ExMIptrLSBs
 (Phi,
              ExMIptrLSBs,
              DyadicExc,
              notInstAndNoExc,
              notBranchTakenMIS,
              notResetOrUnimp,
              MIptrLoadEnable,
              Feedback, FpInst,
	      SelectedMIptr,
              RomMIptr, notRomMIptr);
input [2:0] ExMIptrLSBs ;
input [`MIptrMSB:0] Feedback
;
input [`MIptrMSB:0] Feedback ;
input [7:0] FpInst
;
input [7:0] FpInst ;
input Phi
;
input Phi ;
input DyadicExc
;
input DyadicExc ,
      notInstAndNoExc
,
      notInstAndNoExc ,
      notBranchTakenMIS
,
      notBranchTakenMIS ,
      notResetOrUnimp
,
      notResetOrUnimp ,
      MIptrLoadEnable
,
      MIptrLoadEnable ;
output [`MIptrMSB:0] SelectedMIptr
;
output [`MIptrMSB:0] SelectedMIptr , RomMIptr
, RomMIptr , notRomMIptr
, notRomMIptr ;
ME_TIEOFF toff (vdd
;
ME_TIEOFF toff (vdd , gnd
, gnd );
/* ****************************************************** *
 *                                                        *
 *  1)     Enable has been removed from MIptr             *
 *                                                        *
 *                                                        *
 *                                                        *
 * ****************************************************** */
wire [`MIptrMSB:0] NextMIptr
);
/* ****************************************************** *
 *                                                        *
 *  1)     Enable has been removed from MIptr             *
 *                                                        *
 *                                                        *
 *                                                        *
 * ****************************************************** */
wire [`MIptrMSB:0] NextMIptr ;
// ***************************************//
// Operand Exception Address Generation   //
// ***************************************//
ME_OR2 om2n6 (RomMIptr[2], notRomMIptr[6], MI2ornotMI6
;
// ***************************************//
// Operand Exception Address Generation   //
// ***************************************//
ME_OR2 om2n6 (RomMIptr[2], notRomMIptr[6], MI2ornotMI6 );
ME_NAND2 om16  (notRomMIptr[1], notRomMIptr[6], MI6orMI1
);
ME_NAND2 om16  (notRomMIptr[1], notRomMIptr[6], MI6orMI1 );
MiptrIncrement mii (RomMIptr, NextMIptr);
MIptrMultiplexor mim
                 (Phi,
                  DyadicExc,
                  notInstAndNoExc,
                  notBranchTakenMIS,
                  notResetOrUnimp,
                  MIptrLoadEnable,
                  {FpInst[7], FpInst[3], FpInst[0], FpInst[1],
                   FpInst[6], FpInst[2], FpInst[4], FpInst[5]}, // RomEntry := SPARC code to ROM entry point mapping  //
                  NextMIptr,
                  {RomMIptr[1], MI2ornotMI6, RomMIptr[6], MI6orMI1, gnd, ExMIptrLSBs}, // ExMIptr
                  Feedback,
		  SelectedMIptr,
                  RomMIptr,
                  notRomMIptr);
endmodule
);
MiptrIncrement mii (RomMIptr, NextMIptr);
MIptrMultiplexor mim
                 (Phi,
                  DyadicExc,
                  notInstAndNoExc,
                  notBranchTakenMIS,
                  notResetOrUnimp,
                  MIptrLoadEnable,
                  {FpInst[7], FpInst[3], FpInst[0], FpInst[1],
                   FpInst[6], FpInst[2], FpInst[4], FpInst[5]}, // RomEntry := SPARC code to ROM entry point mapping  //
                  NextMIptr,
                  {RomMIptr[1], MI2ornotMI6, RomMIptr[6], MI6orMI1, gnd, ExMIptrLSBs}, // ExMIptr
                  Feedback,
		  SelectedMIptr,
                  RomMIptr,
                  notRomMIptr);
endmodule
 | This page: | Created: | Thu Aug 19 12:03:34 1999 | 
   | From: | ../../../sparc_v8/ssparc/fpu/fp_ctl/rtl/miptr.v |