/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
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/* */
/******************************************************************************/
/***************************************************************************
****************************************************************************
***
*** Program File: @(#)read_data.v
***
*** Description:
*** Implements the afx read data reg capture, includes endian conversion.
***
****************************************************************************
****************************************************************************/
module read_data(
pcim_big_endian, // big endian mode
little_endian, // processor little_endian
fifo_bm_out,
reset, //reset
clock, //clock
load_afx_read_data_lo, //
load_afx_read_data_hi, //
select_config_add, // selects config address for
// afx reads
select_falcon_data, // selects falcon config regs from core
select_error, // select all f's for error case
mas_rcv1_dataout, // ls word from pci
mas_rcv2_dataout, // ms word from pci
config_add, // configuration address
config_data, // falcon configuration data
read_data_parity, // read data parity
read_data); //AFX data bus (big endian)
// This module generates the AFX data bus for reads and also
// converts from big-endian to little endian in the
// connectivity. (read_data will be big endian.)
parameter WIDTH = 63;
input pcim_big_endian
;
input little_endian
;
input [3:0] fifo_bm_out
;
input reset
;
input clock
;
input load_afx_read_data_lo
;
input load_afx_read_data_hi
;
input select_config_add
;
input select_falcon_data
;
input select_error
;
input [31:0] mas_rcv1_dataout
;
input [31:0] mas_rcv2_dataout
;
input [31:0] config_add
;
input [31:0] config_data
;
output [1:0] read_data_parity
;
output [WIDTH:0] read_data
;
wire [WIDTH:0] read_data;
reg [1:0] read_data_parity;
wire [1:0] read_data_parity_in
;
wire [WIDTH:0] read_data_in
;
assign #1 read_data_parity_in[1] = ^read_data_in[63:32];
assign #1 read_data_parity_in[0] = ^read_data_in[31:0];
wire spread_lo
= load_afx_read_data_lo & ~ load_afx_read_data_hi;
wire spread_hi
= ~load_afx_read_data_lo & load_afx_read_data_hi;
wire load_afx_read_data
= load_afx_read_data_lo | load_afx_read_data_hi;
// duplicate config_data in both words
assign read_data_in = select_config_add ?
{config_add,config_add} :
select_falcon_data ? {config_data,config_data} :
(select_error | reset) ? 64'hffffffffffffffff :
spread_lo ? {mas_rcv1_dataout, mas_rcv1_dataout} :
spread_hi ? {mas_rcv2_dataout, mas_rcv2_dataout} :
{mas_rcv2_dataout,mas_rcv1_dataout};
// big endian bytes are the same as little endian
// words and dwords just word swapped
// half words must be twisted and then byte adjusted
// big words and dwords
wire [63:0] read_data_mux
= pcim_big_endian & fifo_bm_out[3] & fifo_bm_out[0] ?
{read_data_in[31:0], read_data_in[63:32]} :
// big half words
pcim_big_endian & fifo_bm_out[3] & ~fifo_bm_out[0] ?
{read_data_in[15:8],read_data_in[7:0],
read_data_in[31:24],read_data_in[23:16],
read_data_in[47:40],read_data_in[39:32],
read_data_in[63:56],read_data_in[55:48]} :
// big and little bytes and all other little sizes
{read_data_in[7:0],read_data_in[15:8],
read_data_in[23:16],read_data_in[31:24],
read_data_in[39:32],read_data_in[47:40],
read_data_in[55:48],read_data_in[63:56]};
REG64 reg0(read_data,clock,load_afx_read_data, read_data_mux);
//wire [1:0] read_parity_mux = pcim_big_endian ? read_data_parity_in :
// always swap word parity, irregardless of endian
wire [1:0] read_parity_mux
= {read_data_parity_in[0], read_data_parity_in[1]};
always @(posedge clock)
begin
// word parity must be swapped same as the data above!!
if(load_afx_read_data == 1'b1)
begin
read_data_parity <= #1 read_parity_mux;
end
end
endmodule
This page: |
Created: | Thu Aug 19 12:00:01 1999 |
| From: |
../../../sparc_v8/ssparc/pcic/afx_slave/rtl/read_data.v
|