CoolRunner: Top Solutions  

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Project Navigator (Design Entry Tool)

XPLA Professional (Fitting Tool)

XPLA ISP-PC (Download Tool)

Simulator, Attributes, Libraries, and Architecture

Project Navigator (Design Entry Tool)

• Solution 7845: XPLA Professional - What do the CoolRunner net names X_#_ stand for?
• Solution 7697: XPLA -  Differences between ABEL and PHDL
• Solution 7678: XPLA Logistics -  Future support of the CoolRunner software.
• Solution 7548: XPLA -  Designing into a CoolRunner device using VHDL or Verilog? 

XPLA Professional (Fitting Tool)

• Solution 7594: XPLA Architecture - Which CoolRunner products are pin compatible with Altera?
• Solution 7506: XPLA Professional: Print out of pin editor does not look correct?

XPLA ISP-PC (Download Tool)

• Solution 8173: XPLA Family - Which CoolRunner devices have ISP or Boundary Scan operations 
• Solution 7566: XPLA PC-ISP Programmer -  How to load a JEDEC file, versus a JCD file?
• Solution 7627: XPLA-PC-ISP-Error 02 - Write Registry failed, You may not be able to access parallel port.
• Solution 7587: XPLA PC-ISP Programmer - Which download cable is needed to program an ISP CoolRunner CPLD.
• Solution 7569: XPLA PC-ISP Programmer -  Can not find ISP Cable or Board.
• Solution 7593: XPLA Architecture -  JTAG pins with internal weak pull-up/down resistors.
• Solution 8140: XPLA Pro - Error: "No output bin/isp file generated, download aborted"

 

Simulator, Attributes, Libraries, and Architecture

Solution 7633: XPLA1 -  Clock resources available

Solution 7598: XPLA Architecture - Differences between CPLDs and FPGAs.

Solution 8030: XPLA Logistics - Coolrunner TQFP, LQFP are equivalent to Xilinx VQ, TQ packages

Solution 7932: XPLA Professional - Where can I find a CoolRunner Libraries Guide?