LogiCORE PCI32 4000 Master - known Issues
Known Issues
Solution 3414: 4062XLT BG432 -09 Ping example: Timing simulation using VSS causes failure
Solution 5272: Incorrect 'MIN' clock delay value used to compute the setup time
Solution 5275: The timespec "USER_PADS" in the UCF files is incorrect for Viewlogic Flow
Solution 5276: The recorder module in compliance testbench does not get bound in the Express Flow
