[sv-cc] {Disarmed} RE: some responses to some comments

Hi Francoise,

Please see below:

From: Francoise Martinolle
Sent: Wednesday, October 12, 2011 5:48 PM
To: francoise martinolle; Vitaly Yankelevich; Arturo Salz
Cc: Jim Vellenga; Charlie Dawson; SystemVerilog CC DWG
Subject: some responses to some comments

I am reading the annotated mantis document with Arturo/Vitaly comments and I have further comments:

for comment [Art33} and response comment [VY34R33]:
[FM33]: I agree with Arturo, if a DPI-OO imported class method cannot be declared pure virtual
and REFER to a pure virtual method, WHO and HOw is going to check that. This needs to be specified.
[Vitaly] Currently the sentence in question is "SystemVerilog DPI-OO imported class methods cannot be pure virtual [Art1] [Art2] ...
 ..."
Will it answer the question if I change the above to "A pure virtual SystemVerilog method cannot be declared as DPI-OO import. The SystemVerilog compiler must issue an error if such declaration is used"?

For comment [Art37] and response comment [VY38R37]
[FM37]: The class C is imported by reference, I assume it potentially has some inheritance in the foreign language, right?
Snce it is imported by reference, it also imports some methodes declared int he foreign language class declaration by reference:
here the exmaple shows that that the function get_address is imported.
Now we declared the import class C as extending an SV "base_class". Have we now defined 2 difference inheritance trees?
[Vitaly] There were 2 inheritance trees: in SystemVerilog and in the foreign language. Those inheritance trees are not necessarily exactly the same. In the specific example in question those trees are different because SystemVerilog class C extended base_class, while the corresponding class in the foreign language did not, and base_class in the foreign language was not defined.

If we did, I may have further questions/issues related to name conflict resolution.
[Vitaly] Please send your questions/issues. I don't see a name conflict here because the class name base_class is a SystemVerilog native class name.

I think we need a section that describes the casting of such classes.

[Vitaly] I didn't understanding what casting needs to be described. After all, SystemVerilog import class C is a normal SystemVerilog class - the only thing special in this class is that it defines import methods which delegate implementation to the corresponding object instance in the foreign language. Casting between C and base_class shall follow normal SystemVerilog rules.

Regards,
Vitaly

________________________________

 [Art1]How is this condition checked/enforced? An SV compiler cannot check this condition unless it parses the C++ code.

If it is unchecked, it can result in some obscure linker error (the abstract class has no implementation) or perhaps a run-time error depending on the C++ compiler implementation.

 [Art2]I didn't understand the problem here. This sentence prohibits specific declarative syntax "import "DPI-OO" pure virtual ...", Why it cannot be enforced?

If you mean the C++ pure method, then yes - SystemVerilog does not check it. It's beyond the scope of the proposal.

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