Analog/Digital Converters and Modulators

Type	Description	Source
Ideal DAC	ideal digital/analog converter with variable converter size	ideal_dac.va
Ideal ADC	ideal analog/digital converter with variable converter size	ideal_adc.va
First Order Sigma-Delta	first order sigma-delta converter	firstorder_sigmadelta.va
Sample and Hold	sample and hold model sampler model show the application of the sample&hold model with the clock generator	sample_hold.va sampler.va
QAM	quadrature amplitude modulator	qam16.va

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Ideal Digital/Analog Converter

Module Name ideal_dac.va	ideal_dac
Terminals	in : input vector with digital code : input [0:dac_size-1] voltage out : analog output terminal : output voltage
Parameter	dac_size : size of converter = 8 from (1:inf) vth : threshold voltage for input code trise: rising time at output = 0 tfall : falling time at output = 0

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Ideal Analog/Digital Converter

Module Name deal_adc.va	ideal_adc
Terminals	in : analog input terminal : input voltage clk : clock terminal : input voltage out : output vector for digital code : output [0:adc_size-1] voltage
Parameter	adc_size : size of converter = 8 from [1:inf) fullscale : range of the analog input : 1.0 delay : delay time until output starts changing after rising clock : 0 trise : rising time at output = 10n tfall : falling time at output = 10n clk_vth : threshold voltage for input code out_high : output high voltage = 1 out_low : output low voltage = 0

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First Order Sigma-Delta Converter

Module Name firstorder_sigmadelta.va	firstorder_sigmadelta
Terminals	in : analog input terminal : input voltage clk : clock terminal : input voltage out : output terminal : output voltage
Parameter	quantizer_vth : threshold voltage for internal quantizer = 0 clk_vth : threshold voltage for clock input = 2.5 d2a_gain : gain of the internal digital/analog converter = 5

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Sample and Hold

Module Name sample_hold.va	sample_hold
Terminals	in : input terminal : input voltage clk : clock terminal : input voltage out : output terminal : output voltage
Parameter	slewrate : slew rate at the output : 1ns clk_vth : threshold voltage for clock input = 2.5

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Quadrature Amplitude Modulator

Module Name qam16.va	qam16
Terminals	in : input terminal : input [0:3] voltage out : output terminal : output voltage
Parameter	freq : modulation frequency = 1.0 ampl : output amplitude = 1.0 thresh : input threshold voltage = 2.5 tdelay : delay time = 0 ttransit : transition time = 1/freq

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   Last updated on
   December 11, 1998