Xilinx Foundation: Tips and Techniques
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General
Solution 1518 - Foundation: Changing title block information on schematics
Solution 2599 - Foundation: How to use both XACT6-based and M1-based flows with Foundation
Schematic Editor
Solution 2602 - Foundation F1.3/F1.4: How to make bus pin names visible on Logiblox components
Solution 2603 - Foundation F1.3/F1.4: How to change parameters of existing Logiblox components
Simulation
Solution 1286 - Foundation Simulator: Simulating bidirectional signals
Solution 3161 - Foundation Simulator: How much memory is required for a simulation?
Solution 2737 - Foundation F1.3/F1.4: How to simulate VHDL designs with instantiated XNF files
VHDL
Solution 1372 - Foundation XVHDL: How to lock down I/O pins
Solution 1485 - Foundation XVHDL: Using RAM and ROM in XC4000 devices
Solution 2595 - Foundation XVHDL, F1.3/F1.4: How to instantiate Logiblox components
XABEL
Solution 3984 - XABEL patch (v1.4.1) available on Web site
Solution 2776 - Foundation F1.3/F1.4, XABEL: How to generate .PLD (Plusasm) file from XABEL
Solution 3020 - Supported 'Xilinx Property' statements with CPLDs and XABEL6
State Editor
Solution 3020 - Foundation F1.3/F1.4 State Editor: How to modify encoding scheme for State Machine