About I/O banks

For devices that support multiple I/O standards, I/Os are grouped into I/O banks around the chip.  

The I/O Bank Assigner runs in the background when you run Layout and automatically assigns technologies to all I/O banks that have not been assigned a technology. You can also choose to manually run the I/O Bank Assigner in MultiView Navigator.

I/O banks are visible in both ChipPlanner and PinEditor. Information about I/O banks appears in the MultiView Navigator's status bar.

Note: The I/O Bank Assigner runs only for those families that have multiple I/O banks:  Fusion, ProASIC3/E, and Axcelerator.

Fusion

Fusion devices have digital I/Os that are grouped into I/O voltage banks. There are three digital I/O banks on the AFS090 and AFS250 devices and four digital I/O banks on the AFS600 and AFS1500 devices. The north side of I/O in the AFS600 and AFS1500 devices is comprised of two banks of Actel Pro I/Os.

The Actel Pro I/Os support a wide number of voltage referenced I/O standards in addition to the multitude of single-ended and differential I/O standards common throughout all of the Actel digital I/Os. Each I/O voltage bank has dedicated input/output supply and ground voltages (VMV/GNDQ for input buffers and VCCI/GND for output buffers). Because of these dedicated supplies, only I/Os with compatible standards can be assigned to the same I/O voltage bank.  The required voltage values and their compatible I/O standards for Fusion devices are the same as those for ProASIC3E devices (see the “Compatible I/O Standards” table for ProASIC3E and Axcelerator devices below).

For more information about Fusion devices, see the “Fusion Family of Mixed-Signal Flash FPGAs” datasheet on the Actel web site.

ProASIC3E, and Axcelerator

ProASIC3E and Axcelerator devices have eight I/O banks surrounding the chip, two per side, numbered 0-7.  The I/O banks are color-coded for quick identification. You can change the default colors through the Display Settings dialog box.

Each I/O bank has a common:

• VCCI, the supply voltage for its I/Os

• VREF, the reference voltage (for voltage-referenced I/O standards)

Each VREF pin assigned to the same I/O bank must have the same value. For example, you cannot assign a VREF with a VCCI of 1.5 and another with a VCCI of 1.8V to the same I/O bank.

Only I/O standards compatible with the same VCCI and VREF standards can be assigned to the same bank. 

The following table shows the required voltage values and their compatible I/O standards for and Fusion and ProASIC3E devices.

Note: The low-power mode and input delay attributes are not available in the I/O Bank Settings dialog box for ProASIC3E, and ProASIC3 devices. Because these attributes are not available, the More Attributes button is also not available.

The following table shows the required voltage values and their compatible I/O standards for Axcelerator devices.

ProASIC3

ProASIC3 devices have two, four, or eight I/O banks surrounding the chip, one per side, numbered 0-1, 0-3, or 0-7, respectively. Each I/O bank has dedicated resources for an input/output supply voltage (VCCI). Because of these dedicated resources, you can assign only I/Os with compatible standards to the same I/O bank. The following table shows the required voltage values and their compatible I/O standards.  

On some dies, the left and right side of the chip have a different selection of I/O standards (LVDS/LVPECL). Because the dies do not need an input referenced voltage (VREF), the Use Pin for VREF and Highlight VREF Range commands are unavailable from the right-click menu. Also, because the low-power mode and input delay attributes are not available, the More Attributes button is not available in the I/O Bank Settings dialog box.

Note: ProASIC3 devices do not support the Input Delay attribute.

For more about I/O banks, see the datasheet for your device.

See Also

Specifying technologies for an I/O bank

Automatically assigning technologies to I/O banks

Manually assigning technologies to banks

Assigning pins in ProASIC3E

Assigning VREF pins