FPGA Configuration Memory - Application Notes

				Programming Specification for Atmel's AT17 and AT17A Series FPGA Configuration EEPROMs (28 pages, updated 7/99) This Application Note provides details of the serial bus protocol and device features used for in-system programming (ISP). The included reference schematics are applicable to users of the CPS programming utility as well.
				AT17A Conversions from Altera FPGA Serial Configuration Memories (13 pages, updated 10/99) This Application Note describes use of the Atmel Configurator in place of Altera's EPCxxxx OTPs
				C Routines for the AVR Microcontroller/AT17CXXX ISP Code (4 pages, updated 4/99) "This Application Note describes how to In-System Program (ISP) an Atmel FPGA Configuration Memory (Configurator) using an Atmel AVR Microcontroller and how to "bit-bang" the industry standard 2-wire protocol." See Software section to download at17c8515.zip.
				C Code for Interfacing AVR® to AT17CXX FPGA Configuration Memory (18 pages, updated 10/99) This Application Note describes how to In-System-Program (ISP) and Atmel FPGA Configuration Memory using an Atmel AVE MCU and how to bit bang I2C using port pins on an AT90S8515 AVR MCU