XC9500XL
XC9500 CoolRunner Tutorials |
Configuration
Solutions
Programmer Solutions XCELL Articles |
Application Notes | Ver. | Date | Size |
XAPP144: Designing CPLD Multi-voltage Systems | 1.1 | 02/00 | 60 KB |
XAPP141: In-System Programming Times for XC9500XL | 1.0 | 4/99 | 18 KB |
XAPP115: Planning for High Speed XC9500XL Designs | 1.0 | 9/98 | 110 KB |
XAPP114: Understanding XC9500XL CPLD Power | 1.1 | 1/99 | 90 KB |
XAPP112: Designing With XC9500XL CPLDs | 1.1 | 1/99 | 160 KB |
XAPP111: Using the XC9500XL Timing Model | 1.2 | 1/99 | 100 KB |
Application Brief | Ver. | Date | Size |
XBRF017: XC9500XL Versus MAX 7000A Architecture Comparison | 1.1 | 9/98 | 60 KB |
Title | Size |
Exemplar/ModelSim Tutorial for CPLDs | 300 KB |
Mentor Schematic Design Tutorial | 1 MB |
OrCAD/ModelSim Tutorial for CPLDs | 200 KB |
Synopsys Design Compiler/FPGA Compiler/ModelSim Tutorial for CPLDs | 200 KB |
Synplify/ModelSim Tutorial for CPLDs | 200 KB |
Workstation Flow for Xilinx CoolRunner CPLDs | 50 KB |
Download associated PC design files for VHDL and Verilog |