HARDWIRE ASIC

HardWire ASIC

Built-in Cost Reduction Program

By providing a complete turn-key conversion service, the engineering burden normally associated with conventional gate array redesign is eliminated.

HardWire cost reduction benefits can be dramatic. The HardWire Gate Array is functionally equivalent and pin-for-pin compatible with the FPGA, but with a smaller die size and significantly lower cost.Xilinx provides a complete solution for product life-cycle management. This total solution is comprised of industry-leading FPGAs and development tools, Xilinx LogiCORE^™ Modules, and HardWire ASIC. This complete solution reduces customers' development time and increases flexibility from design concept through to cost-effective production ICs.

Xilinx HardWire ASICs offer a complete turn-key conversion service which eliminates the engineering and risk burden normally associated with conventional gate array retargeting. Using our patented DesignLock^™ conversion process, the HardWire ASIC is functionally equivalent and pin-for-pin compatible with the FPGA because it uses the customer-verified FPGA database.

FPGA + Development Tools + LogiCORE + HardWire ASICs =

Optimized for No Risk Migration

Xilinx has offered this cost reduction service since 1991, and is committed to support the conversion of designs which use all of the advanced FPGA features such as Select-RAM, JTAG, Configuration Emulation, and LogiCORE functions. No company in the industry has more experience converting Xilinx FPGA designs than Xilinx.

Benefits of Using the Xilinx FPGA/HardWire
ASIC Combination

	Reduces system/device development time
	FPGAs allow concurrent software development and debug
	Fastest time to market
	Conversion from verified FPGA design database
	Same packaging and pinouts as FPGA
	No test vectors required from customer
	No additional engineering effort to achieve cost reduction
	Minimum order quantities as low as 3500 units per year

Direct Conversion from FPGA to a HardWire
ASIC Versus Gate Array Re-Targeting

	Conversion uses completed FPGA design database
	No manufacturing test vectors required
	No recapture in third-party libraries required
	Greater than 95% fault coverage provided by Xilinx
	No logic redesign or functional verification required

Complete HardWire Product Families

Xilinx offers a HardWire ASIC for every Xilinx FPGA family. Both commercial and industrial grade temperature ranges are available.