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Xilinx has a programmable
logic solution for virtually any CPLD design need, from
high-speed PAL integration to those designs requiring
real-time hardware changes using in-system programmable
(ISP) devices.
XC9500 family - The New Standard in ISP ISP is revolutionizing today's system designs by providing programming techniques for designing and developing systems with new, previously unattainable capabilities. This ISP capability is the heart of the new XC9500 family. Designers can easily perform unlimited design iterations during the prototyping phase, extensive system in-board debugging, programming and testing during manufacturing, and field upgrades. The XC9500 devices provide the flexibility of 5V ISP with fast, guaranteed timing, the industry's best pin-locking architecture, a full JTAG compliant interface and 10,000 program/erase cycles. |
The XC9500 family, with its advanced architecture, is fast becoming the new standard for all ISP CPLDs by providing new levels of features and flexibility for today's system designers. |
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Click here to view CPLD Product Selection Matrix. Click here to view CPLD Package Options and User I/O chart.
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